ARM: OMAP: GPIO: Fix valid range and enable usage of all GPIOs on OMAP5

[u-boot] / arch / arm / cpu / armv7 / omap5 / hwinit.c

diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c
index afb700022734b9efa4fa2327eeb3a4e819e55139..11ba36b8756d5d4e1fef312ada3879fbcccf741f 100644 (file)
--- a/arch/arm/cpu/armv7/omap5/hwinit.c
+++ b/arch/arm/cpu/armv7/omap5/hwinit.c
@@ -43,13 +43,15 @@ DECLARE_GLOBAL_DATA_PTR;
 
 u32 *const omap_si_rev = (u32 *)OMAP_SRAM_SCRATCH_OMAP_REV;
 
-static struct gpio_bank gpio_bank_54xx[6] = {
+static struct gpio_bank gpio_bank_54xx[8] = {
        { (void *)OMAP54XX_GPIO1_BASE, METHOD_GPIO_24XX },
        { (void *)OMAP54XX_GPIO2_BASE, METHOD_GPIO_24XX },
        { (void *)OMAP54XX_GPIO3_BASE, METHOD_GPIO_24XX },
        { (void *)OMAP54XX_GPIO4_BASE, METHOD_GPIO_24XX },
        { (void *)OMAP54XX_GPIO5_BASE, METHOD_GPIO_24XX },
        { (void *)OMAP54XX_GPIO6_BASE, METHOD_GPIO_24XX },
+       { (void *)OMAP54XX_GPIO7_BASE, METHOD_GPIO_24XX },
+       { (void *)OMAP54XX_GPIO8_BASE, METHOD_GPIO_24XX },
 };
 
 const struct gpio_bank *const omap_gpio_bank = gpio_bank_54xx;
@@ -100,16 +102,21 @@ static void io_settings_ddr3(void)
        writel(ioregs->ctrl_emif_sdram_config_ext,
               (*ctrl)->control_emif2_sdram_config_ext);
 
-       /* Disable DLL select */
-       io_settings = (readl((*ctrl)->control_port_emif1_sdram_config)
+       if (is_omap54xx()) {
+               /* Disable DLL select */
+               io_settings = (readl((*ctrl)->control_port_emif1_sdram_config)
                                                        & 0xFFEFFFFF);
-       writel(io_settings,
-               (*ctrl)->control_port_emif1_sdram_config);
+               writel(io_settings,
+                       (*ctrl)->control_port_emif1_sdram_config);
 
-       io_settings = (readl((*ctrl)->control_port_emif2_sdram_config)
+               io_settings = (readl((*ctrl)->control_port_emif2_sdram_config)
                                                        & 0xFFEFFFFF);
-       writel(io_settings,
-               (*ctrl)->control_port_emif2_sdram_config);
+               writel(io_settings,
+                       (*ctrl)->control_port_emif2_sdram_config);
+       } else {
+               writel(ioregs->ctrl_ddr_ctrl_ext_0,
+                               (*ctrl)->control_ddr_control_ext_0);
+       }
 }
 
 /*
@@ -201,6 +208,9 @@ void srcomp_enable(void)
        u32 sysclk_ind  = get_sys_clk_index();
        u32 omap_rev    = omap_revision();
 
+       if (!is_omap54xx())
+               return;
+
        mul_factor = srcomp_parameters[sysclk_ind].multiply_factor;
        div_factor = srcomp_parameters[sysclk_ind].divide_factor;