]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/cpu/armv7/s5pc1xx/clock.c
arm: socfpga: spl: Add call to timer_init
[u-boot] / arch / arm / cpu / armv7 / s5pc1xx / clock.c
index c9b54856e3aac74ed71f6444f45354bbf6a2224c..3da00717f44762c370aaba1acc63fc3d17eafc3d 100644 (file)
@@ -3,23 +3,7 @@
  * Minkyu Kang <mk7.kang@samsung.com>
  * Heungjun Kim <riverful.kim@samsung.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #define CONFIG_SYS_CLK_FREQ_C110       24000000
 #endif
 
-unsigned long (*get_pclk)(void);
-unsigned long (*get_arm_clk)(void);
-unsigned long (*get_pll_clk)(int);
-
 /* s5pc110: return pll clock frequency */
 static unsigned long s5pc100_get_pll_clk(int pllreg)
 {
@@ -297,15 +277,51 @@ static unsigned long s5pc100_get_pclk(void)
        return get_pclkd1();
 }
 
-void s5p_clock_init(void)
+/* s5pc1xx: return uart clock frequency */
+static unsigned long s5pc1xx_get_uart_clk(int dev_index)
 {
-       if (cpu_is_s5pc110()) {
-               get_pll_clk = s5pc110_get_pll_clk;
-               get_arm_clk = s5pc110_get_arm_clk;
-               get_pclk = s5pc110_get_pclk;
-       } else {
-               get_pll_clk = s5pc100_get_pll_clk;
-               get_arm_clk = s5pc100_get_arm_clk;
-               get_pclk = s5pc100_get_pclk;
-       }
+       if (cpu_is_s5pc110())
+               return s5pc110_get_pclk();
+       else
+               return s5pc100_get_pclk();
+}
+
+/* s5pc1xx: return pwm clock frequency */
+static unsigned long s5pc1xx_get_pwm_clk(void)
+{
+       if (cpu_is_s5pc110())
+               return s5pc110_get_pclk();
+       else
+               return s5pc100_get_pclk();
+}
+
+unsigned long get_pll_clk(int pllreg)
+{
+       if (cpu_is_s5pc110())
+               return s5pc110_get_pll_clk(pllreg);
+       else
+               return s5pc100_get_pll_clk(pllreg);
+}
+
+unsigned long get_arm_clk(void)
+{
+       if (cpu_is_s5pc110())
+               return s5pc110_get_arm_clk();
+       else
+               return s5pc100_get_arm_clk();
+}
+
+unsigned long get_pwm_clk(void)
+{
+       return s5pc1xx_get_pwm_clk();
+}
+
+unsigned long get_uart_clk(int dev_index)
+{
+       return s5pc1xx_get_uart_clk(dev_index);
+}
+
+void set_mmc_clk(int dev_index, unsigned int div)
+{
+       /* Do NOTHING */
 }