omap: gpmc: 'nandecc sw' can use HAM1 or BCH8

[u-boot] / arch / arm / cpu / armv7 / sunxi / fel_utils.S

diff --git a/arch/arm/cpu/armv7/sunxi/fel_utils.S b/arch/arm/cpu/armv7/sunxi/fel_utils.S
index 0c1de52df889b242e645536f7db9532f4cb0e9dd..bf0033552d23b34b079e3055c3c062981b25b15e 100644 (file)
--- a/arch/arm/cpu/armv7/sunxi/fel_utils.S
+++ b/arch/arm/cpu/armv7/sunxi/fel_utils.S
@@ -15,11 +15,28 @@ ENTRY(save_boot_params)
        ldr     r0, =fel_stash
        str     sp, [r0, #0]
        str     lr, [r0, #4]
+       mrs     lr, cpsr                @ Read CPSR
+       str     lr, [r0, #8]
+       mrc     p15, 0, lr, c1, c0, 0   @ Read CP15 SCTLR Register
+       str     lr, [r0, #12]
+       mrc     p15, 0, lr, c12, c0, 0  @ Read VBAR
+       str     lr, [r0, #16]
+       mrc     p15, 0, lr, c1, c0, 0   @ Read CP15 Control Register
+       str     lr, [r0, #20]
        b       save_boot_params_ret
 ENDPROC(save_boot_params)
 
 ENTRY(return_to_fel)
        mov     sp, r0
        mov     lr, r1
+       ldr     r0, =fel_stash
+       ldr     r1, [r0, #20]
+       mcr     p15, 0, r1, c1, c0, 0   @ Write CP15 Control Register
+       ldr     r1, [r0, #16]
+       mcr     p15, 0, r1, c12, c0, 0  @ Write VBAR
+       ldr     r1, [r0, #12]
+       mcr     p15, 0, r1, c1, c0, 0   @ Write CP15 SCTLR Register
+       ldr     r1, [r0, #8]
+       msr     cpsr, r1                @ Write CPSR
        bx      lr
 ENDPROC(return_to_fel)