arm: vf610: improve evaluation of reset source

[u-boot] / arch / arm / cpu / armv7 / vf610 / generic.c

diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c
index 48dd60aa696e070e551a836aed83d807b7499c94..92aaad941548391fbf5ae76bbcab4fb581661d86 100644 (file)
--- a/arch/arm/cpu/armv7/vf610/generic.c
+++ b/arch/arm/cpu/armv7/vf610/generic.c
@@ -191,6 +191,11 @@ u32 get_fec_clk(void)
        return freq;
 }
 
+static u32 get_i2c_clk(void)
+{
+       return get_ipg_clk();
+}
+
 unsigned int mxc_get_clock(enum mxc_clock clk)
 {
        switch (clk) {
@@ -206,6 +211,8 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
                return get_sdhc_clk();
        case MXC_FEC_CLK:
                return get_fec_clk();
+       case MXC_I2C_CLK:
+               return get_i2c_clk();
        default:
                break;
        }
@@ -258,20 +265,21 @@ static char *get_reset_cause(void)
 
        cause = readl(&src_regs->srsr);
        writel(cause, &src_regs->srsr);
-       cause &= 0xff;
 
-       switch (cause) {
-       case 0x08:
-               return "WDOG";
-       case 0x20:
+       if (cause & SRC_SRSR_POR_RST)
+               return "POWER ON RESET";
+       else if (cause & SRC_SRSR_WDOG_A5)
+               return "WDOG A5";
+       else if (cause & SRC_SRSR_WDOG_M4)
+               return "WDOG M4";
+       else if (cause & SRC_SRSR_JTAG_RST)
                return "JTAG HIGH-Z";
-       case 0x80:
+       else if (cause & SRC_SRSR_SW_RST)
+               return "SW RESET";
+       else if (cause & SRC_SRSR_RESETB)
                return "EXTERNAL RESET";
-       case 0xfd:
-               return "POR";
-       default:
+       else
                return "unknown reset";
-       }
 }
 
 int print_cpuinfo(void)