imx6: isiotmx6ul: Add FEC support

[u-boot] / arch / arm / cpu / armv7 / virt-v7.c

diff --git a/arch/arm/cpu/armv7/virt-v7.c b/arch/arm/cpu/armv7/virt-v7.c
index 4cb88062385205920cb8998dad79db85694323f6..d33e5c61a9c29890989666b472ad5eb355961e01 100644 (file)
--- a/arch/arm/cpu/armv7/virt-v7.c
+++ b/arch/arm/cpu/armv7/virt-v7.c
@@ -46,14 +46,21 @@ static unsigned long get_gicd_base_address(void)
 #endif
 }
 
+/* Define a specific version of this function to enable any available
+ * hardware protections for the reserved region */
+void __weak protect_secure_section(void) {}
+
 static void relocate_secure_section(void)
 {
 #ifdef CONFIG_ARMV7_SECURE_BASE
        size_t sz = __secure_end - __secure_start;
+       unsigned long szflush = ALIGN(sz + 1, CONFIG_SYS_CACHELINE_SIZE);
 
        memcpy((void *)CONFIG_ARMV7_SECURE_BASE, __secure_start, sz);
+
        flush_dcache_range(CONFIG_ARMV7_SECURE_BASE,
-                          CONFIG_ARMV7_SECURE_BASE + sz + 1);
+                          CONFIG_ARMV7_SECURE_BASE + szflush);
+       protect_secure_section();
        invalidate_icache_all();
 #endif
 }
@@ -75,6 +82,10 @@ void __weak smp_kick_all_cpus(void)
        kick_secondary_cpus_gic(gic_dist_addr);
 }
 
+__weak void psci_board_init(void)
+{
+}
+
 int armv7_init_nonsec(void)
 {
        unsigned int reg;
@@ -112,6 +123,8 @@ int armv7_init_nonsec(void)
        for (i = 1; i <= itlinesnr; i++)
                writel((unsigned)-1, gic_dist_addr + GICD_IGROUPRn + 4 * i);
 
+       psci_board_init();
+
        /*
         * Relocate secure section before any cpu runs in secure ram.
         * smp_kick_all_cpus may enable other cores and runs into secure