distro: use imply to enable DISTRO_DEFAULTS as SoC default

[u-boot] / arch / arm / cpu / armv8 / fsl-layerscape / Kconfig

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index d5f0e559647eb9a9d5cc1dccb31f83b363f16f5c..7edc06d20263a1970d78b7684e07a24f92a02e4e 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -1,7 +1,10 @@
 config ARCH_LS1012A
        bool
        select ARMV8_SET_SMPEN
+       select ARM_ERRATA_855873
        select FSL_LSCH2
+       select SYS_FSL_SRDS_1
+       select SYS_HAS_SERDES
        select SYS_FSL_DDR_BE
        select SYS_FSL_MMDC
        select SYS_FSL_ERRATUM_A010315
@@ -11,12 +14,18 @@ config ARCH_LS1012A
        select SYS_FSL_ERRATUM_A009008
        select ARCH_EARLY_INIT_R
        select BOARD_EARLY_INIT_F
+       select SYS_I2C_MXC
+       select SYS_I2C_MXC_I2C1
+       select SYS_I2C_MXC_I2C2
        imply PANIC_HANG
 
 config ARCH_LS1043A
        bool
        select ARMV8_SET_SMPEN
+       select ARM_ERRATA_855873
        select FSL_LSCH2
+       select SYS_FSL_SRDS_1
+       select SYS_HAS_SERDES
        select SYS_FSL_DDR
        select SYS_FSL_DDR_BE
        select SYS_FSL_DDR_VER_50
@@ -35,6 +44,11 @@ config ARCH_LS1043A
        select SYS_FSL_HAS_DDR4
        select ARCH_EARLY_INIT_R
        select BOARD_EARLY_INIT_F
+       select SYS_I2C_MXC
+       select SYS_I2C_MXC_I2C1
+       select SYS_I2C_MXC_I2C2
+       select SYS_I2C_MXC_I2C3
+       select SYS_I2C_MXC_I2C4
        imply SCSI
        imply SCSI_AHCI
        imply CMD_PCI
@@ -43,6 +57,8 @@ config ARCH_LS1046A
        bool
        select ARMV8_SET_SMPEN
        select FSL_LSCH2
+       select SYS_FSL_SRDS_1
+       select SYS_HAS_SERDES
        select SYS_FSL_DDR
        select SYS_FSL_DDR_BE
        select SYS_FSL_DDR_VER_50
@@ -62,13 +78,21 @@ config ARCH_LS1046A
        select SYS_FSL_SRDS_2
        select ARCH_EARLY_INIT_R
        select BOARD_EARLY_INIT_F
+       select SYS_I2C_MXC
+       select SYS_I2C_MXC_I2C1
+       select SYS_I2C_MXC_I2C2
+       select SYS_I2C_MXC_I2C3
+       select SYS_I2C_MXC_I2C4
        imply SCSI
        imply SCSI_AHCI
 
 config ARCH_LS1088A
        bool
        select ARMV8_SET_SMPEN
+       select ARM_ERRATA_855873
        select FSL_LSCH3
+       select SYS_FSL_SRDS_1
+       select SYS_HAS_SERDES
        select SYS_FSL_DDR
        select SYS_FSL_DDR_LE
        select SYS_FSL_DDR_VER_50
@@ -91,6 +115,11 @@ config ARCH_LS1088A
        select FSL_TZASC_1
        select ARCH_EARLY_INIT_R
        select BOARD_EARLY_INIT_F
+       select SYS_I2C_MXC
+       select SYS_I2C_MXC_I2C1
+       select SYS_I2C_MXC_I2C2
+       select SYS_I2C_MXC_I2C3
+       select SYS_I2C_MXC_I2C4
        imply SCSI
        imply PANIC_HANG
 
@@ -102,6 +131,8 @@ config ARCH_LS2080A
        select ARM_ERRATA_829520
        select ARM_ERRATA_833471
        select FSL_LSCH3
+       select SYS_FSL_SRDS_1
+       select SYS_HAS_SERDES
        select SYS_FSL_DDR
        select SYS_FSL_DDR_LE
        select SYS_FSL_DDR_VER_50
@@ -131,6 +162,12 @@ config ARCH_LS2080A
        select SYS_FSL_ERRATUM_A009203
        select ARCH_EARLY_INIT_R
        select BOARD_EARLY_INIT_F
+       select SYS_I2C_MXC
+       select SYS_I2C_MXC_I2C1
+       select SYS_I2C_MXC_I2C2
+       select SYS_I2C_MXC_I2C3
+       select SYS_I2C_MXC_I2C4
+       imply DISTRO_DEFAULTS
        imply PANIC_HANG
 
 config FSL_LSCH2
@@ -139,13 +176,9 @@ config FSL_LSCH2
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_COMPAT_5
        select SYS_FSL_SEC_BE
-       select SYS_FSL_SRDS_1
-       select SYS_HAS_SERDES
 
 config FSL_LSCH3
        bool
-       select SYS_FSL_SRDS_1
-       select SYS_HAS_SERDES
 
 config FSL_MC_ENET
        bool "Management Complex network"