#include <fsl_ddr.h>
#endif
#include <asm/arch/clock.h>
+#include <hwconfig.h>
+#include <fsl_qbman.h>
DECLARE_GLOBAL_DATA_PTR;
return 0;
}
+static void config_core_prefetch(void)
+{
+ char *buf = NULL;
+ char buffer[HWCONFIG_BUFFER_SIZE];
+ const char *prefetch_arg = NULL;
+ size_t arglen;
+ unsigned int mask;
+ struct pt_regs regs;
+
+ if (env_get_f("hwconfig", buffer, sizeof(buffer)) > 0)
+ buf = buffer;
+
+ prefetch_arg = hwconfig_subarg_f("core_prefetch", "disable",
+ &arglen, buf);
+
+ if (prefetch_arg) {
+ mask = simple_strtoul(prefetch_arg, NULL, 0) & 0xff;
+ if (mask & 0x1) {
+ printf("Core0 prefetch can't be disabled\n");
+ return;
+ }
+
+#define SIP_PREFETCH_DISABLE_64 0xC200FF13
+ regs.regs[0] = SIP_PREFETCH_DISABLE_64;
+ regs.regs[1] = mask;
+ smc_call(®s);
+
+ if (regs.regs[0])
+ printf("Prefetch disable config failed for mask ");
+ else
+ printf("Prefetch disable config passed for mask ");
+ printf("0x%x\n", mask);
+ }
+}
+
int arch_early_init_r(void)
{
#ifdef CONFIG_SYS_FSL_ERRATUM_A009635
* erratum A009635 is valid only for LS2080A SoC and
* its personalitiesi
*/
- svr_dev_id = get_svr() >> 16;
- if (svr_dev_id == SVR_DEV_LS2080A)
+ svr_dev_id = get_svr();
+ if (IS_SVR_DEV(svr_dev_id, SVR_DEV(SVR_LS2080A)))
erratum_a009635();
#endif
#if defined(CONFIG_SYS_FSL_ERRATUM_A009942) && defined(CONFIG_SYS_FSL_DDR)
fsl_rgmii_init();
#endif
+ config_core_prefetch();
+
#ifdef CONFIG_SYS_HAS_SERDES
fsl_serdes_init();
#endif
#ifdef CONFIG_FMAN_ENET
fman_enet_init();
+#endif
+#ifdef CONFIG_SYS_DPAA_QBMAN
+ setup_qbman_portals();
#endif
return 0;
}
* For LS2080A SoC and its personalities, timer controller
* offset is different
*/
- svr_dev_id = get_svr() >> 16;
- if (svr_dev_id == SVR_DEV_LS2080A)
+ svr_dev_id = get_svr();
+ if (IS_SVR_DEV(svr_dev_id, SVR_DEV(SVR_LS2080A)))
cntcr = (u32 *)SYS_FSL_LS2080A_LS2085A_TIMER_ADDR;
#endif
/*
* For ARMv8 SoCs, DDR memory is split into two or three regions. The
- * first region is 2GB space at 0x8000_0000. If the memory extends to
- * the second region (or the third region if applicable), the secure
- * memory and Management Complex (MC) memory should be put into the
- * highest region, i.e. the end of DDR memory. CONFIG_MAX_MEM_MAPPED
- * is set to the size of first region so U-Boot doesn't relocate itself
- * into higher address. Should DDR be configured to skip the first
- * region, this function needs to be adjusted.
+ * first region is 2GB space at 0x8000_0000. Secure memory needs to
+ * allocated from first region. If the memory extends to the second
+ * region (or the third region if applicable), Management Complex (MC)
+ * memory should be put into the highest region, i.e. the end of DDR
+ * memory. CONFIG_MAX_MEM_MAPPED is set to the size of first region so
+ * U-Boot doesn't relocate itself into higher address. Should DDR be
+ * configured to skip the first region, this function needs to be
+ * adjusted.
*/
if (gd->ram_size > CONFIG_MAX_MEM_MAPPED) {
ea_size = CONFIG_MAX_MEM_MAPPED;
#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
/* Check if we have enough space for secure memory */
- if (rem > CONFIG_SYS_MEM_RESERVE_SECURE) {
- rem -= CONFIG_SYS_MEM_RESERVE_SECURE;
- } else {
- if (ea_size > CONFIG_SYS_MEM_RESERVE_SECURE) {
- ea_size -= CONFIG_SYS_MEM_RESERVE_SECURE;
- rem = 0; /* Presume MC requires more memory */
- } else {
- printf("Error: No enough space for secure memory.\n");
- }
- }
+ if (ea_size > CONFIG_SYS_MEM_RESERVE_SECURE)
+ ea_size -= CONFIG_SYS_MEM_RESERVE_SECURE;
+ else
+ printf("Error: No enough space for secure memory.\n");
#endif
/* Check if we have enough memory for MC */
if (rem < board_reserve_ram_top(rem)) {
* memory. The DDR extends from low region to high region(s) presuming
* no hole is created with DDR configuration. gd->arch.secure_ram tracks
* the location of secure memory. gd->arch.resv_ram tracks the location
- * of reserved memory for Management Complex (MC).
+ * of reserved memory for Management Complex (MC). Because gd->ram_size
+ * is reduced by this function if secure memory is reserved, checking
+ * gd->arch.secure_ram should be done to avoid running it repeatedly.
*/
+
+#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
+ if (gd->arch.secure_ram & MEM_RESERVE_SECURE_MAINTAINED) {
+ debug("No need to run again, skip %s\n", __func__);
+
+ return 0;
+ }
+#endif
+
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
if (gd->ram_size > CONFIG_SYS_DDR_BLOCK1_SIZE) {
gd->bd->bi_dram[0].size = CONFIG_SYS_DDR_BLOCK1_SIZE;
gd->bd->bi_dram[0].size = gd->ram_size;
}
#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-#ifdef CONFIG_SYS_DDR_BLOCK3_BASE
- if (gd->bd->bi_dram[2].size >= CONFIG_SYS_MEM_RESERVE_SECURE) {
- gd->bd->bi_dram[2].size -= CONFIG_SYS_MEM_RESERVE_SECURE;
- gd->arch.secure_ram = gd->bd->bi_dram[2].start +
- gd->bd->bi_dram[2].size;
+ if (gd->bd->bi_dram[0].size >
+ CONFIG_SYS_MEM_RESERVE_SECURE) {
+ gd->bd->bi_dram[0].size -=
+ CONFIG_SYS_MEM_RESERVE_SECURE;
+ gd->arch.secure_ram = gd->bd->bi_dram[0].start +
+ gd->bd->bi_dram[0].size;
gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
gd->ram_size -= CONFIG_SYS_MEM_RESERVE_SECURE;
- } else
-#endif
- {
- if (gd->bd->bi_dram[1].size >= CONFIG_SYS_MEM_RESERVE_SECURE) {
- gd->bd->bi_dram[1].size -=
- CONFIG_SYS_MEM_RESERVE_SECURE;
- gd->arch.secure_ram = gd->bd->bi_dram[1].start +
- gd->bd->bi_dram[1].size;
- gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
- gd->ram_size -= CONFIG_SYS_MEM_RESERVE_SECURE;
- } else if (gd->bd->bi_dram[0].size >
- CONFIG_SYS_MEM_RESERVE_SECURE) {
- gd->bd->bi_dram[0].size -=
- CONFIG_SYS_MEM_RESERVE_SECURE;
- gd->arch.secure_ram = gd->bd->bi_dram[0].start +
- gd->bd->bi_dram[0].size;
- gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
- gd->ram_size -= CONFIG_SYS_MEM_RESERVE_SECURE;
- }
}
#endif /* CONFIG_SYS_MEM_RESERVE_SECURE */
}
#endif
+#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
+ debug("%s is called. gd->ram_size is reduced to %lu\n",
+ __func__, (ulong)gd->ram_size);
+#endif
+
return 0;
}
projects / u-boot / blobdiff