armv8: lsch3: Use SVR based timer base address detection

[u-boot] / arch / arm / cpu / armv8 / fsl-layerscape / fdt.c

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index 40d6a761e8703a31312627f7ba003351c3db4e95..0dae5faad81038e6d587a6f386cf65df381bdd8c 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <efi_loader.h>
 #include <libfdt.h>
 #include <fdt_support.h>
 #include <phy.h>
@@ -105,9 +106,32 @@ remove_psci_node:
 
        fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
                        *boot_code_size);
+#if defined(CONFIG_EFI_LOADER) && !defined(CONFIG_SPL_BUILD)
+       efi_add_memory_map((uintptr_t)&secondary_boot_code,
+                          ALIGN(*boot_code_size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT,
+                          EFI_RESERVED_MEMORY_TYPE, false);
+#endif
 }
 #endif
 
+void fsl_fdt_disable_usb(void *blob)
+{
+       int off;
+       /*
+        * SYSCLK is used as a reference clock for USB. When the USB
+        * controller is used, SYSCLK must meet the additional requirement
+        * of 100 MHz.
+        */
+       if (CONFIG_SYS_CLK_FREQ != 100000000) {
+               off = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3");
+               while (off != -FDT_ERR_NOTFOUND) {
+                       fdt_status_disabled(blob, off);
+                       off = fdt_node_offset_by_compatible(blob, off,
+                                                           "snps,dwc3");
+               }
+       }
+}
+
 void ft_cpu_setup(void *blob, bd_t *bd)
 {
 #ifdef CONFIG_FSL_LSCH2
@@ -150,4 +174,6 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 #ifdef CONFIG_SYS_DPAA_FMAN
        fdt_fixup_fman_firmware(blob);
 #endif
+       fsl_fdt_disable_usb(blob);
+
 }