arm64: zynqmp: Wire SD1 level shifter mode to SPL

[u-boot] / arch / arm / cpu / armv8 / start.S

diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 354468b9053d5e03d7ca8d513ce33623abd47c32..5c500be51d1f5fb616e04539e5fd2cb9e7287e3b 100644 (file)
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -91,9 +91,12 @@ save_boot_params_ret:
         * this bit should be set for A53/A57/A72.
         */
 #ifdef CONFIG_ARMV8_SET_SMPEN
+       switch_el x1, 3f, 1f, 1f
+3:
        mrs     x0, S3_1_c15_c2_1               /* cpuectlr_el1 */
        orr     x0, x0, #0x40
        msr     S3_1_c15_c2_1, x0
+1:
 #endif
 
        /* Apply ARM core specific erratas */