.endm
.globl _start
-_start: b reset
+_start:
+ ldr pc, _reset
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
ldr pc, _irq
ldr pc, _fiq
+_reset: .word reset
_undefined_instruction: .word undefined_instruction
_software_interrupt: .word software_interrupt
_prefetch_abort: .word prefetch_abort
.globl _bss_end_ofs
_bss_end_ofs:
+ .word __bss_end - _start
+
+.globl _end_ofs
+_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
str r1, [r2]
/* make sure flash is visible at 0 */
-#if 0
- ldr r2, =IXP425_EXP_CFG0
- ldr r1, [r2]
- orr r1, r1, #0x80000000
- str r1, [r2]
-#endif
mov r1, #CONFIG_SYS_SDR_CONFIG
ldr r2, =IXP425_SDR_CONFIG
str r1, [r2]
str r1, [r4]
DELAY_FOR 0x4000, r0
- /* copy */
- mov r0, #0
- mov r4, r0
- add r2, r0, #CONFIG_SYS_MONITOR_LEN
- mov r1, #0x10000000
- mov r5, r1
-
- 30:
- ldr r3, [r0], #4
- str r3, [r1], #4
- cmp r0, r2
- bne 30b
-
/* invalidate I & D caches & BTB */
mcr p15, 0, r0, c7, c7, 0
CPWAIT r0
mcr p15, 0, r0, c7, c10, 4
CPWAIT r0
- /* move flash to 0x50000000 */
+ /* remove flash mirror at 0x00000000 */
ldr r2, =IXP425_EXP_CFG0
ldr r1, [r2]
bic r1, r1, #0x80000000
str r1, [r2]
- nop
- nop
- nop
- nop
- nop
- nop
-
/* invalidate I & Data TLB */
mcr p15, 0, r0, c8, c7, 0
CPWAIT r0
orr r0,r0,#0x13
msr cpsr,r0
-/* Set stackpointer in internal RAM to call board_init_f */
-call_board_init_f:
- ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
- ldr r0,=0x00000000
- bl board_init_f
+ bl _main
/*------------------------------------------------------------------------------*/
mov r4, r0 /* save addr_sp */
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
- mov r7, r2 /* save addr of destination */
-
- /* Set up the stack */
-stack_setup:
- mov sp, r4
adr r0, _start
- ldr r2, _TEXT_BASE
+ cmp r0, r6
+ moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
+ beq relocate_done /* skip relocation */
+ mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
- cmp r0, r6
- beq clear_bss
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
- stmia r6!, {r9-r10} /* copy to target address [r1] */
+ stmia r1!, {r9-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
-#ifndef CONFIG_PRELOADER
+#ifndef CONFIG_SPL_BUILD
/*
* fix .rel.dyn relocations
*/
ldr r0, _TEXT_BASE /* r0 <- Text base */
- sub r9, r7, r0 /* r9 <- relocation offset */
+ sub r9, r6, r0 /* r9 <- relocation offset */
ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
add r10, r10, r0 /* r10 <- sym table in FLASH */
ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
add r0, r0, r9 /* r0 <- location to fix up in RAM */
ldr r1, [r2, #4]
- and r8, r1, #0xff
- cmp r8, #23 /* relative fixup? */
+ and r7, r1, #0xff
+ cmp r7, #23 /* relative fixup? */
beq fixrel
- cmp r8, #2 /* absolute fixup? */
+ cmp r7, #2 /* absolute fixup? */
beq fixabs
/* ignore unknown type of fixup */
b fixnext
mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
add r1, r10, r1 /* r1 <- address of symbol in table */
ldr r1, [r1, #4] /* r1 <- symbol value */
- add r1, r9 /* r1 <- relocated sym addr */
+ add r1, r1, r9 /* r1 <- relocated sym addr */
b fixnext
fixrel:
/* relative fix: increase location by offset */
blo fixloop
#endif
-clear_bss:
-#ifndef CONFIG_PRELOADER
- ldr r0, _bss_start_ofs
- ldr r1, _bss_end_ofs
- ldr r3, _TEXT_BASE /* Text base */
- mov r4, r7 /* reloc addr */
- add r0, r0, r4
- add r1, r1, r4
- mov r2, #0x00000000 /* clear */
-
-clbss_l:str r2, [r0] /* clear loop... */
- add r0, r0, #4
- cmp r0, r1
- bne clbss_l
-
- bl coloured_LED_init
- bl red_LED_on
-#endif
+relocate_done:
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
- ldr r0, _board_init_r_ofs
- adr r1, _start
- add lr, r0, r1
- add lr, lr, r9
- /* setup parameters for board_init_r */
- mov r0, r5 /* gd_t */
- mov r1, r7 /* dest_addr */
- /* jump to it ... */
- mov pc, lr
-
-_board_init_r_ofs:
- .word board_init_r - _start
+ bx lr
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
_dynsym_start_ofs:
.word __dynsym_start - _start
+ .globl c_runtime_cpu_setup
+c_runtime_cpu_setup:
+
+ bx lr
+
/****************************************************************************/
/* */
/* Interrupt handling */
str r1, [r2]
b reset_endless
-
reset_endless:
-
b reset_endless
-
-#ifdef CONFIG_USE_IRQ
-
-.LC0: .word loops_per_jiffy
-
-/*
- * 0 <= r0 <= 2000
- */
-.globl __udelay
-__udelay:
- mov r2, #0x6800
- orr r2, r2, #0x00db
- mul r0, r2, r0
- ldr r2, .LC0
- ldr r2, [r2] @ max = 0x0fffffff
- mov r0, r0, lsr #11 @ max = 0x00003fff
- mov r2, r2, lsr #11 @ max = 0x0003ffff
- mul r0, r2, r0 @ max = 2^32-1
- movs r0, r0, lsr #6
-
-delay_loop:
- subs r0, r0, #1
- bne delay_loop
- mov pc, lr
-
-#endif /* CONFIG_USE_IRQ */