]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/cpu/u-boot.lds
Merge branch 'next'
[u-boot] / arch / arm / cpu / u-boot.lds
index 03cd9f60f943f496ad1a6d34feed614a1f6d1e1a..13aa4fa48814f6da575e9ed53ff94be74d4a833d 100644 (file)
@@ -14,6 +14,24 @@ OUTPUT_ARCH(arm)
 ENTRY(_start)
 SECTIONS
 {
+#if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC)
+       /*
+        * If CONFIG_ARMV7_SECURE_BASE is true, secure code will not
+        * bundle with u-boot, and code offsets are fixed. Secure zone
+        * only needs to be copied from the loading address to
+        * CONFIG_ARMV7_SECURE_BASE, which is the linking and running
+        * address for secure code.
+        *
+        * If CONFIG_ARMV7_SECURE_BASE is undefined, the secure zone will
+        * be included in u-boot address space, and some absolute address
+        * were used in secure code. The absolute addresses of the secure
+        * code also needs to be relocated along with the accompanying u-boot
+        * code.
+        *
+        * So DISCARD is only for CONFIG_ARMV7_SECURE_BASE.
+        */
+       /DISCARD/ : { *(.rel._secure*) }
+#endif
        . = 0x00000000;
 
        . = ALIGN(4);
@@ -72,6 +90,36 @@ SECTIONS
 
        . = ALIGN(4);
 
+       .__efi_runtime_start : {
+               *(.__efi_runtime_start)
+       }
+
+       .efi_runtime : {
+               *(efi_runtime_text)
+               *(efi_runtime_data)
+       }
+
+       .__efi_runtime_stop : {
+               *(.__efi_runtime_stop)
+       }
+
+       .efi_runtime_rel_start :
+       {
+               *(.__efi_runtime_rel_start)
+       }
+
+       .efi_runtime_rel : {
+               *(.relefi_runtime_text)
+               *(.relefi_runtime_data)
+       }
+
+       .efi_runtime_rel_stop :
+       {
+               *(.__efi_runtime_rel_stop)
+       }
+
+       . = ALIGN(4);
+
        .image_copy_end :
        {
                *(.__image_copy_end)