]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/dts/am57xx-idk-common.dtsi
arm64: mvebu: armada-7040-db.dts: Add I2C and SPI aliases
[u-boot] / arch / arm / dts / am57xx-idk-common.dtsi
index 2805b68f3e0b19065b8dccfeebd4eb21608a24ac..a5bcd25d7b7f9ac1eea3f8f1258dc5ec3b2caeed 100644 (file)
        ti,non-removable;
        max-frequency = <96000000>;
 };
+
+&qspi {
+       status = "okay";
+
+       spi-max-frequency = <76800000>;
+       m25p80@0 {
+               compatible = "s25fl256s1","spi-flash";
+               spi-max-frequency = <76800000>;
+               reg = <0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               /* MTD partition table.
+                * The ROM checks the first four physical blocks
+                * for a valid file to boot and the flash here is
+                * 64KiB block size.
+                */
+               partition@0 {
+                       label = "QSPI.SPL";
+                       reg = <0x00000000 0x000040000>;
+               };
+               partition@1 {
+                       label = "QSPI.u-boot";
+                       reg = <0x00040000 0x00100000>;
+               };
+               partition@2 {
+                       label = "QSPI.u-boot-spl-os";
+                       reg = <0x00140000 0x00080000>;
+               };
+               partition@3 {
+                       label = "QSPI.u-boot-env";
+                       reg = <0x001c0000 0x00010000>;
+               };
+               partition@4 {
+                       label = "QSPI.u-boot-env.backup1";
+                       reg = <0x001d0000 0x0010000>;
+               };
+               partition@5 {
+                       label = "QSPI.kernel";
+                       reg = <0x001e0000 0x0800000>;
+               };
+               partition@6 {
+                       label = "QSPI.file-system";
+                       reg = <0x009e0000 0x01620000>;
+               };
+       };
+};