]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/dts/exynos54xx.dtsi
ls102xa: Fix reset hang
[u-boot] / arch / arm / dts / exynos54xx.dtsi
index c21d798a23d0b54a295d6f0a90a8f5c578f925dc..bd3619d75137f0b884824eab6f3a73cc4b8c1098 100644 (file)
@@ -5,7 +5,8 @@
  * SPDX-License-Identifier:    GPL-2.0+
  */
 
-/include/ "exynos5.dtsi"
+#include "exynos5.dtsi"
+#include "exynos54xx-pinctrl.dtsi"
 
 / {
        config {
        };
 
        aliases {
-               i2c0 = "/i2c@12c60000";
-               i2c1 = "/i2c@12c70000";
-               i2c2 = "/i2c@12c80000";
-               i2c3 = "/i2c@12c90000";
-               i2c4 = "/i2c@12ca0000";
-               i2c5 = "/i2c@12cb0000";
-               i2c6 = "/i2c@12cc0000";
-               i2c7 = "/i2c@12cd0000";
-               i2c8 = "/i2c@12e00000";
-               i2c9 = "/i2c@12e10000";
-               i2c10 = "/i2c@12e20000";
+               i2c0 = "/i2c@12C60000";
+               i2c1 = "/i2c@12C70000";
+               i2c2 = "/i2c@12C80000";
+               i2c3 = "/i2c@12C90000";
+               i2c4 = "/i2c@12CA0000";
+               i2c5 = "/i2c@12CB0000";
+               i2c6 = "/i2c@12CC0000";
+               i2c7 = "/i2c@12CD0000";
+               i2c8 = "/i2c@12E00000";
+               i2c9 = "/i2c@12E10000";
+               i2c10 = "/i2c@12E20000";
+               pinctrl0 = &pinctrl_0;
+               pinctrl1 = &pinctrl_1;
+               pinctrl2 = &pinctrl_2;
+               pinctrl3 = &pinctrl_3;
+               pinctrl4 = &pinctrl_4;
                spi0 = "/spi@12d20000";
                spi1 = "/spi@12d30000";
                spi2 = "/spi@12d40000";
@@ -36,7 +42,7 @@
                xhci1 = "/xhci@12400000";
        };
 
-       i2c@12ca0000 {
+       i2c@12CA0000 {
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "samsung,exynos5-hsi2c";
@@ -44,7 +50,7 @@
                interrupts = <0 60 0>;
        };
 
-       i2c@12cb0000 {
+       i2c@12CB0000 {
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "samsung,exynos5-hsi2c";
@@ -52,7 +58,7 @@
                interrupts = <0 61 0>;
        };
 
-       i2c@12cc0000 {
+       i2c@12CC0000 {
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "samsung,exynos5-hsi2c";
@@ -60,7 +66,7 @@
                interrupts = <0 62 0>;
        };
 
-       i2c@12cd0000 {
+       i2c@12CD0000 {
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "samsung,exynos5-hsi2c";
@@ -68,7 +74,7 @@
                interrupts = <0 63 0>;
        };
 
-       i2c@12e00000 {
+       i2c@12E00000 {
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "samsung,exynos5-hsi2c";
@@ -76,7 +82,7 @@
                interrupts = <0 87 0>;
        };
 
-       i2c@12e10000 {
+       i2c@12E10000 {
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "samsung,exynos5-hsi2c";
@@ -84,7 +90,7 @@
                interrupts = <0 88 0>;
        };
 
-       i2c@12e20000 {
+       i2c@12E20000 {
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "samsung,exynos5-hsi2c";
                reg = <0x14680000 0x100>;
        };
 
+       pinctrl_0: pinctrl@13400000 {
+               compatible = "samsung,exynos5420-pinctrl";
+               reg = <0x13400000 0x1000>;
+               interrupts = <0 45 0>;
+
+               wakeup-interrupt-controller {
+                       compatible = "samsung,exynos4210-wakeup-eint";
+                       interrupt-parent = <&gic>;
+                       interrupts = <0 32 0>;
+               };
+       };
+
+       pinctrl_1: pinctrl@13410000 {
+               compatible = "samsung,exynos5420-pinctrl";
+               reg = <0x13410000 0x1000>;
+               interrupts = <0 78 0>;
+       };
+
+       pinctrl_2: pinctrl@14000000 {
+               compatible = "samsung,exynos5420-pinctrl";
+               reg = <0x14000000 0x1000>;
+               interrupts = <0 46 0>;
+       };
+
+       pinctrl_3: pinctrl@14010000 {
+               compatible = "samsung,exynos5420-pinctrl";
+               reg = <0x14010000 0x1000>;
+               interrupts = <0 50 0>;
+       };
+
+       pinctrl_4: pinctrl@03860000 {
+               compatible = "samsung,exynos5420-pinctrl";
+               reg = <0x03860000 0x1000>;
+               interrupts = <0 47 0>;
+       };
+
        fimd@14400000 {
                /* sysmmu is not used in U-Boot */
                samsung,disable-sysmmu;
+               samsung,pwm-out-gpio = <&gpb2 0 GPIO_ACTIVE_HIGH>;
        };
 
        dp@145b0000 {