interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "dspi";
clocks = <&platform_clk 1>;
- spi-num-chipselects = <5>;
+ num-cs = <6>;
big-endian;
status = "disabled";
};
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "dspi";
clocks = <&platform_clk 1>;
- spi-num-chipselects = <5>;
+ num-cs = <6>;
+ big-endian;
+ status = "disabled";
+ };
+
+ qspi: quadspi@1550000 {
+ compatible = "fsl,vf610-qspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1550000 0x10000>,
+ <0x40000000 0x4000000>;
+ num-cs = <2>;
big-endian;
status = "disabled";
};
compatible = "fsl,16550-FIFO64", "ns16550a";
reg = <0x21c0500 0x100>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
- clock-frequency = <0>;
fifo-size = <15>;
status = "disabled";
};
compatible = "fsl,16550-FIFO64", "ns16550a";
reg = <0x21c0600 0x100>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
- clock-frequency = <0>;
fifo-size = <15>;
status = "disabled";
};
compatible = "fsl,16550-FIFO64", "ns16550a";
reg = <0x21d0500 0x100>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
- clock-frequency = <0>;
fifo-size = <15>;
status = "disabled";
};
compatible = "fsl,16550-FIFO64", "ns16550a";
reg = <0x21d0600 0x100>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
- clock-frequency = <0>;
fifo-size = <15>;
status = "disabled";
};