]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/dts/r8a77990-ebisu.dts
ARM: dts: rmobile: Add SCIF2 pinmux to E3 Ebisu
[u-boot] / arch / arm / dts / r8a77990-ebisu.dts
index 63ee1347bb1900196f3ff80e6e91f536f1752398..8c1b6a69402d0931047e0c0c1a55ffab7ef74295 100644 (file)
@@ -7,6 +7,7 @@
 
 /dts-v1/;
 #include "r8a77990.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
        model = "Renesas Ebisu board based on r8a77990";
@@ -14,6 +15,7 @@
 
        aliases {
                serial0 = &scif2;
+               ethernet0 = &avb;
        };
 
        chosen {
        };
 };
 
+&avb {
+       pinctrl-0 = <&avb_pins>;
+       pinctrl-names = "default";
+       renesas,no-ether-link;
+       phy-handle = <&phy0>;
+       phy-mode = "rgmii-txid";
+       status = "okay";
+
+       phy0: ethernet-phy@0 {
+               rxc-skew-ps = <1500>;
+               reg = <0>;
+               interrupt-parent = <&gpio2>;
+               interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
+               reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
+       };
+};
+
 &extal_clk {
        clock-frequency = <48000000>;
 };
 
+&pfc {
+       pinctrl-0 = <&scif_clk_pins>;
+       pinctrl-names = "default";
+
+       avb_pins: avb {
+               mux {
+                       groups = "avb_link", "avb_mii";
+                       function = "avb";
+               };
+       };
+
+       scif2_pins: scif2 {
+               groups = "scif2_data_a";
+               function = "scif2";
+       };
+
+       scif_clk_pins: scif_clk {
+               groups = "scif_clk_a";
+               function = "scif_clk";
+       };
+};
+
 &scif2 {
+       pinctrl-0 = <&scif2_pins>;
+       pinctrl-names = "default";
+
        status = "okay";
 };