SPDX: Convert all of our single license tags to Linux Kernel style

[u-boot] / arch / arm / dts / rk3288.dtsi

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index bcf051a9d9b374b31aed4ec7894c6d466851c551..9f3f6f5051664f8ce2ea021f7b3ab6313ab87e7e 100644 (file)
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -1,6 +1,4 @@
-/*
- * SPDX-License-Identifier:    GPL-2.0+
- */
+// SPDX-License-Identifier: GPL-2.0+
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/irq.h>
@@ -167,7 +165,7 @@
 
        sdmmc: dwmmc@ff0c0000 {
                compatible = "rockchip,rk3288-dw-mshc";
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
                         <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
@@ -179,7 +177,7 @@
 
        sdio0: dwmmc@ff0d0000 {
                compatible = "rockchip,rk3288-dw-mshc";
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
                         <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
@@ -191,7 +189,7 @@
 
        sdio1: dwmmc@ff0e0000 {
                compatible = "rockchip,rk3288-dw-mshc";
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>,
                         <&cru SCLK_SDIO1_DRV>, <&cru SCLK_SDIO1_SAMPLE>;
                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
@@ -203,7 +201,7 @@
 
        emmc: dwmmc@ff0f0000 {
                compatible = "rockchip,rk3288-dw-mshc";
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
                         <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
@@ -604,19 +602,16 @@
                u-boot,dm-pre-reloc;
                #clock-cells = <1>;
                #reset-cells = <1>;
-               assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>,
-                                 <&cru PLL_GPLL>, <&cru PLL_CPLL>,
+               assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
                                  <&cru PLL_NPLL>, <&cru ACLK_CPU>,
                                  <&cru HCLK_CPU>, <&cru PCLK_CPU>,
                                  <&cru ACLK_PERI>, <&cru HCLK_PERI>,
                                  <&cru PCLK_PERI>;
-               assigned-clock-rates = <0>, <0>,
-                                      <594000000>, <400000000>,
+               assigned-clock-rates = <594000000>, <400000000>,
                                       <500000000>, <300000000>,
                                       <150000000>, <75000000>,
                                       <300000000>, <150000000>,
                                       <75000000>;
-               assigned-clock-parents = <&cru PLL_NPLL>, <&cru PLL_GPLL>;
        };
 
        grf: syscon@ff770000 {
@@ -664,6 +659,7 @@
        };
 
        vopb: vop@ff930000 {
+               u-boot,dm-pre-reloc;
                compatible = "rockchip,rk3288-vop";
                reg = <0xff930000 0x19c>;
                interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
@@ -689,6 +685,11 @@
                                reg = <2>;
                                remote-endpoint = <&lvds_in_vopb>;
                        };
+                       vopb_out_mipi: endpoint@3 {
+                               reg = <3>;
+                               remote-endpoint = <&mipi_in_vopb>;
+                       };
+
                };
        };
 
@@ -729,6 +730,11 @@
                                reg = <2>;
                                remote-endpoint = <&lvds_in_vopl>;
                        };
+                       vopl_out_mipi: endpoint@3 {
+                               reg = <3>;
+                               remote-endpoint = <&mipi_in_vopl>;
+                       };
+
                };
        };
 
@@ -823,6 +829,36 @@
                };
        };
 
+       mipi_dsi0: mipi@ff960000 {
+               compatible = "rockchip,rk3288_mipi_dsi";
+               reg = <0xff960000 0x4000>;
+               clocks = <&cru PCLK_MIPI_DSI0>;
+               clock-names = "pclk_mipi";
+               /*pinctrl-names = "default";
+               pinctrl-0 = <&lcdc0_ctl>;*/
+               rockchip,grf = <&grf>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <1>;
+                       mipi_in: port {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               mipi_in_vopb: endpoint@0 {
+                                       reg = <0>;
+                                       remote-endpoint = <&vopb_out_mipi>;
+                               };
+                               mipi_in_vopl: endpoint@1 {
+                                       reg = <1>;
+                                       remote-endpoint = <&vopl_out_mipi>;
+                               };
+                       };
+               };
+       };
+
        hdmi_audio: hdmi_audio {
                compatible = "rockchip,rk3288-hdmi-audio";
                i2s-controller = <&i2s>;