]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/dts/rk3399-evb.dts
rockchip: dts: evb-rk3399: add gmac support
[u-boot] / arch / arm / dts / rk3399-evb.dts
index 574eb1cf960fe5e9c7ddd7ec29288602ab98b2e9..77b452198186a1da7db4bced0e2330f665f38161 100644 (file)
@@ -6,6 +6,7 @@
 
 /dts-v1/;
 #include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/pinctrl/rockchip.h>
 #include "rk3399.dtsi"
 #include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
 
                gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
        };
 
+       clkin_gmac: external-gmac-clock {
+               compatible = "fixed-clock";
+               clock-frequency = <125000000>;
+               clock-output-names = "clkin_gmac";
+               #clock-cells = <0>;
+       };
 };
 
 &emmc_phy {
                };
        };
 };
+
+&gmac {
+        phy-supply = <&vcc_phy>;
+       phy-mode = "rgmii";
+       clock_in_out = "input";
+       snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+       snps,reset-active-low;
+       snps,reset-delays-us = <0 10000 50000>;
+       assigned-clocks = <&cru SCLK_RMII_SRC>;
+       assigned-clock-parents = <&clkin_gmac>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&rgmii_pins>;
+       tx_delay = <0x10>;
+       rx_delay = <0x10>;
+       status = "okay";
+};
+
+&gmac {
+        phy-supply = <&vcc_phy>;
+       phy-mode = "rgmii";
+       clock_in_out = "input";
+       snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+       snps,reset-active-low;
+       snps,reset-delays-us = <0 10000 50000>;
+       assigned-clocks = <&cru SCLK_RMII_SRC>;
+       assigned-clock-parents = <&clkin_gmac>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&rgmii_pins>;
+       tx_delay = <0x10>;
+       rx_delay = <0x10>;
+       status = "okay";
+};