]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/dts/rk3399.dtsi
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
[u-boot] / arch / arm / dts / rk3399.dtsi
index 456fdb61986046a584e74c90c7750c30215c775e..d94d7802cb420b8ffc70603294c9b4293510c97e 100644 (file)
@@ -26,6 +26,7 @@
                serial4 = &uart4;
                mmc0 = &sdhci;
                mmc1 = &sdmmc;
+               i2c0 = &i2c0;
        };
 
        cpus {
                compatible = "rockchip,rk3399-xhci";
                reg = <0x0 0xfe800000 0x0 0x100000>;
                status = "disabled";
-               rockchip,vbus-gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
                snps,dis-enblslpm-quirk;
                snps,phyif-utmi-bits = <16>;
                snps,dis-u2-freeclk-exists-quirk;
                compatible = "rockchip,rk3399-xhci";
                reg = <0x0 0xfe900000 0x0 0x100000>;
                status = "disabled";
-               rockchip,vbus-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
                snps,dis-enblslpm-quirk;
                snps,phyif-utmi-bits = <16>;
                snps,dis-u2-freeclk-exists-quirk;
                interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
        };
 
+        gmac: eth@fe300000 {
+                compatible = "rockchip,rk3399-gmac";
+                reg = <0x0 0xfe300000 0x0 0x10000>;
+                rockchip,grf = <&grf>;
+                interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH 0>;
+                interrupt-names = "macirq";
+                clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX>,
+                         <&cru SCLK_MAC_TX>, <&cru SCLK_MACREF>,
+                         <&cru SCLK_MACREF_OUT>, <&cru ACLK_GMAC>,
+                         <&cru PCLK_GMAC>;
+                clock-names = "stmmaceth", "mac_clk_rx",
+                              "mac_clk_tx", "clk_mac_ref",
+                              "clk_mac_refout", "aclk_mac",
+                              "pclk_mac";
+                resets = <&cru SRST_A_GMAC>;
+                reset-names = "stmmaceth";
+                status = "disabled";
+        };
+
        spdif: spdif@ff870000 {
                compatible = "rockchip,rk3399-spdif";
                reg = <0x0 0xff870000 0x0 0x1000>;
                status = "disabled";
        };
 
+       i2c0: i2c@ff3c0000 {
+               compatible = "rockchip,rk3399-i2c";
+               reg = <0x0 0xff3c0000 0x0 0x1000>;
+               assigned-clocks = <&pmucru SCLK_I2C0_PMU>;
+               assigned-clock-rates = <200000000>;
+               clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>;
+               clock-names = "i2c", "pclk";
+               interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH 0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2c0_xfer>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
        pinctrl: pinctrl {
                u-boot,dm-pre-reloc;
                compatible = "rockchip,rk3399-pinctrl";
                        };
                };
 
+               gmac {
+                       rgmii_pins: rgmii-pins {
+                               rockchip,pins =
+                                       /* mac_txclk */
+                                       <3 17 RK_FUNC_1 &pcfg_pull_none_13ma>,
+                                       /* mac_rxclk */
+                                       <3 14 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_mdio */
+                                       <3 13 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_txen */
+                                       <3 12 RK_FUNC_1 &pcfg_pull_none_13ma>,
+                                       /* mac_clk */
+                                       <3 11 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_rxdv */
+                                       <3 9 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_mdc */
+                                       <3 8 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_rxd1 */
+                                       <3 7 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_rxd0 */
+                                       <3 6 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_txd1 */
+                                       <3 5 RK_FUNC_1 &pcfg_pull_none_13ma>,
+                                       /* mac_txd0 */
+                                       <3 4 RK_FUNC_1 &pcfg_pull_none_13ma>,
+                                       /* mac_rxd3 */
+                                       <3 3 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_rxd2 */
+                                       <3 2 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_txd3 */
+                                       <3 1 RK_FUNC_1 &pcfg_pull_none_13ma>,
+                                       /* mac_txd2 */
+                                       <3 0 RK_FUNC_1 &pcfg_pull_none_13ma>;
+                       };
+               };
+
                sdmmc {
                        sdmmc_bus1: sdmmc-bus1 {
                                rockchip,pins =