spi: Fix zynq SPI binding

[u-boot] / arch / arm / dts / socfpga.dtsi

diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
index 145e1251bb9b1470aebe42f151f794bea37577a7..9b1242025dcec7e6a091ae40b93490779ea1928c 100644 (file)
--- a/arch/arm/dts/socfpga.dtsi
+++ b/arch/arm/dts/socfpga.dtsi
@@ -637,12 +637,41 @@
                        interrupts = <0 151 4>;
                        clocks = <&qspi_clk>;
                        ext-decoder = <0>;  /* external decoder */
-                       num-chipselect = <4>;
+                       num-cs = <4>;
                        fifo-depth = <128>;
+                       sram-size = <128>;
                        bus-num = <2>;
                        status = "disabled";
                };
 
+               spi0: spi@fff00000 {
+                       compatible = "snps,dw-apb-ssi";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0xfff00000 0x1000>;
+                       interrupts = <0 154 4>;
+                       num-cs = <4>;
+                       bus-num = <0>;
+                       tx-dma-channel = <&pdma 16>;
+                       rx-dma-channel = <&pdma 17>;
+                       clocks = <&per_base_clk>;
+                       status = "disabled";
+               };
+
+               spi1: spi@fff01000 {
+                       compatible = "snps,dw-apb-ssi";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0xfff01000 0x1000>;
+                       interrupts = <0 156 4>;
+                       num-cs = <4>;
+                       bus-num = <1>;
+                       tx-dma-channel = <&pdma 20>;
+                       rx-dma-channel = <&pdma 21>;
+                       clocks = <&per_base_clk>;
+                       status = "disabled";
+               };
+
                /* Local timer */
                timer@fffec600 {
                        compatible = "arm,cortex-a9-twd-timer";