]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/dts/socfpga.dtsi
arm: socfpga: scan: Staticize scan_mgr_io_scan_chain_prg()
[u-boot] / arch / arm / dts / socfpga.dtsi
index bca68327df1b370b11fcb9a2e28212503746e0dc..e17e9f4a3ca8807fa401d18613244465e260ae17 100644 (file)
                timer1 = &timer1;
                timer2 = &timer2;
                timer3 = &timer3;
+               spi0 = &qspi;
+               spi1 = &spi0;
+               spi2 = &spi1;
+               mmc = &mmc;
        };
 
        cpus {
                        clock-names = "biu", "ciu";
                };
 
+               qspi: spi@ff705000 {
+                       compatible = "cadence,qspi";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0xff705000 0x1000>,
+                               <0xffa00000 0x1000>;
+                       interrupts = <0 151 4>;
+                       clocks = <&qspi_clk>;
+                       ext-decoder = <0>;  /* external decoder */
+                       num-cs = <4>;
+                       fifo-depth = <128>;
+                       sram-size = <128>;
+                       bus-num = <2>;
+                       status = "disabled";
+               };
+
+               spi0: spi@fff00000 {
+                       compatible = "snps,dw-apb-ssi";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0xfff00000 0x1000>;
+                       interrupts = <0 154 4>;
+                       num-cs = <4>;
+                       bus-num = <0>;
+                       tx-dma-channel = <&pdma 16>;
+                       rx-dma-channel = <&pdma 17>;
+                       clocks = <&per_base_clk>;
+                       status = "disabled";
+               };
+
+               spi1: spi@fff01000 {
+                       compatible = "snps,dw-apb-ssi";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0xfff01000 0x1000>;
+                       interrupts = <0 156 4>;
+                       num-cs = <4>;
+                       bus-num = <1>;
+                       tx-dma-channel = <&pdma 20>;
+                       rx-dma-channel = <&pdma 21>;
+                       clocks = <&per_base_clk>;
+                       status = "disabled";
+               };
+
                /* Local timer */
                timer@fffec600 {
                        compatible = "arm,cortex-a9-twd-timer";