ARM: dts: stm32mp157: Add vrefbuf DT node

[u-boot] / arch / arm / dts / stm32mp157.dtsi

diff --git a/arch/arm/dts/stm32mp157.dtsi b/arch/arm/dts/stm32mp157.dtsi
index 32d3984259b56b14cdd01f316c77bb3bd5301248..2b894162e9e963ea7cde4ed7aea3845a416bf0ad 100644 (file)
--- a/arch/arm/dts/stm32mp157.dtsi
+++ b/arch/arm/dts/stm32mp157.dtsi
@@ -86,6 +86,20 @@
                        status = "disabled";
                };
 
+               sdmmc3: sdmmc@48004000 {
+                       compatible = "st,stm32-sdmmc2";
+                       reg = <0x48004000 0x400>, <0x48005000 0x400>;
+                       reg-names = "sdmmc", "delay";
+                       interrupts = <GIC_SPI 137 IRQ_TYPE_NONE>;
+                       clocks = <&rcc_clk SDMMC3_K>;
+                       resets = <&rcc_rst SDMMC3_R>;
+                       st,idma = <1>;
+                       cap-sd-highspeed;
+                       cap-mmc-highspeed;
+                       max-frequency = <120000000>;
+                       status = "disabled";
+               };
+
                rcc: rcc@50000000 {
                        compatible = "syscon", "simple-mfd";
 
@@ -100,6 +114,55 @@
                                #reset-cells = <1>;
                                compatible = "st,stm32mp1-rcc-rst";
                        };
+
+                       rcc_reboot: rcc-reboot@50000000 {
+                               compatible = "syscon-reboot";
+                               regmap = <&rcc>;
+                               offset = <0x404>;
+                               mask = <0x1>;
+                       };
+               };
+
+               pwr: pwr@50001000 {
+                       compatible = "st,stm32mp1-pwr", "st,stm32-pwr", "syscon", "simple-mfd";
+                       reg = <0x50001000 0x400>;
+                       system-power-controller;
+                       interrupts = <GIC_SPI 149 IRQ_TYPE_NONE>;
+                       st,sysrcc = <&rcc>;
+                       clocks = <&rcc_clk PLL2_R>;
+                       clock-names = "phyclk";
+
+                       pwr-regulators@c {
+                               compatible = "st,stm32mp1,pwr-reg";
+                               st,tzcr = <&rcc 0x0 0x1>;
+
+                               reg11: reg11 {
+                                       regulator-name = "reg11";
+                                       regulator-min-microvolt = <1100000>;
+                                       regulator-max-microvolt = <1100000>;
+                               };
+
+                               reg18: reg18 {
+                                       regulator-name = "reg18";
+                                       regulator-min-microvolt = <1800000>;
+                                       regulator-max-microvolt = <1800000>;
+                               };
+
+                               usb33: usb33 {
+                                       regulator-name = "usb33";
+                                       regulator-min-microvolt = <3300000>;
+                                       regulator-max-microvolt = <3300000>;
+                               };
+                       };
+               };
+
+               vrefbuf: vrefbuf@50025000 {
+                       compatible = "st,stm32-vrefbuf";
+                       reg = <0x50025000 0x8>;
+                       regulator-min-microvolt = <1500000>;
+                       regulator-max-microvolt = <2500000>;
+                       clocks = <&rcc_clk VREF>;
+                       status = "disabled";
                };
 
                pinctrl: pin-controller {
@@ -288,6 +351,20 @@
                        status = "disabled";
                };
 
+               sdmmc2: sdmmc@58007000 {
+                       compatible = "st,stm32-sdmmc2";
+                       reg = <0x58007000 0x1000>, <0x58008000 0x1000>;
+                       reg-names = "sdmmc", "delay";
+                       interrupts = <GIC_SPI 124 IRQ_TYPE_NONE>;
+                       clocks = <&rcc_clk SDMMC2_K>;
+                       resets = <&rcc_rst SDMMC2_R>;
+                       st,idma = <1>;
+                       cap-sd-highspeed;
+                       cap-mmc-highspeed;
+                       max-frequency = <120000000>;
+                       status = "disabled";
+               };
+
                i2c4: i2c@5c002000 {
                        compatible = "st,stm32f7-i2c";
                        reg = <0x5c002000 0x400>;