]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/dts/sun8i-a23-a33.dtsi
Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze
[u-boot] / arch / arm / dts / sun8i-a23-a33.dtsi
index 7abd0ae3143d74e1f9ba9b2638fc55353a306d7c..7e05e09e61c7e49fa78a287220047e70f0b2fa99 100644 (file)
@@ -56,7 +56,7 @@
                #size-cells = <1>;
                ranges;
 
-               framebuffer@0 {
+               simplefb_lcd: framebuffer@0 {
                        compatible = "allwinner,simple-framebuffer",
                                     "simple-framebuffer";
                        allwinner,pipeline = "de_be0-lcd0";
                        clock-output-names = "apb1";
                };
 
-               ahb1_gates: clk@01c20060 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun8i-a23-ahb1-gates-clk";
-                       reg = <0x01c20060 0x8>;
-                       clocks = <&ahb1>;
-                       clock-output-names = "ahb1_mipidsi", "ahb1_dma",
-                                       "ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2",
-                                       "ahb1_nand", "ahb1_sdram",
-                                       "ahb1_hstimer", "ahb1_spi0",
-                                       "ahb1_spi1", "ahb1_otg", "ahb1_ehci",
-                                       "ahb1_ohci", "ahb1_ve", "ahb1_lcd",
-                                       "ahb1_csi", "ahb1_be",  "ahb1_fe",
-                                       "ahb1_gpu", "ahb1_spinlock",
-                                       "ahb1_drc";
-               };
-
                apb1_gates: clk@01c20068 {
                        #clock-cells = <1>;
                        compatible = "allwinner,sun8i-a23-apb1-gates-clk";
                        reg = <0x01c20068 0x4>;
                        clocks = <&apb1>;
+                       clock-indices = <0>, <5>,
+                                       <12>, <13>;
                        clock-output-names = "apb1_codec", "apb1_pio",
                                        "apb1_daudio0", "apb1_daudio1";
                };
                        compatible = "allwinner,sun8i-a23-apb2-gates-clk";
                        reg = <0x01c2006c 0x4>;
                        clocks = <&apb2>;
+                       clock-indices = <0>, <1>,
+                                       <2>, <16>,
+                                       <17>, <18>,
+                                       <19>, <20>;
                        clock-output-names = "apb2_i2c0", "apb2_i2c1",
                                        "apb2_i2c2", "apb2_uart0",
                                        "apb2_uart1", "apb2_uart2",
                        #size-cells = <0>;
                };
 
+               ehci0: usb@01c1a000 {
+                       compatible = "allwinner,sun8i-a23-ehci", "generic-ehci";
+                       reg = <0x01c1a000 0x100>;
+                       interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ahb1_gates 26>;
+                       resets = <&ahb1_rst 26>;
+                       phys = <&usbphy 1>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
+               ohci0: usb@01c1a400 {
+                       compatible = "allwinner,sun8i-a23-ohci", "generic-ohci";
+                       reg = <0x01c1a400 0x100>;
+                       interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ahb1_gates 29>, <&usb_clk 16>;
+                       resets = <&ahb1_rst 29>;
+                       phys = <&usbphy 1>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
                pio: pinctrl@01c20800 {
                        /* compatible gets set in SoC specific dtsi file */
                        reg = <0x01c20800 0x400>;
                        clocks = <&apb1_gates 5>;
                        gpio-controller;
                        interrupt-controller;
-                       #address-cells = <1>;
-                       #size-cells = <0>;
+                       #interrupt-cells = <3>;
                        #gpio-cells = <3>;
 
                        uart0_pins_a: uart0@0 {
                                allwinner,pins = "PC5", "PC6", "PC8",
                                                 "PC9", "PC10", "PC11",
                                                 "PC12", "PC13", "PC14",
-                                                "PC15";
+                                                "PC15", "PC16";
                                allwinner,function = "mmc2";
                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
                        };
 
+                       pwm0_pins: pwm0 {
+                               allwinner,pins = "PH0";
+                               allwinner,function = "pwm0";
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                       };
+
                        i2c0_pins_a: i2c0@0 {
                                allwinner,pins = "PH2", "PH3";
                                allwinner,function = "i2c0";
                        interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
                };
 
+               pwm: pwm@01c21400 {
+                       compatible = "allwinner,sun7i-a20-pwm";
+                       reg = <0x01c21400 0xc>;
+                       clocks = <&osc24M>;
+                       #pwm-cells = <3>;
+                       status = "disabled";
+               };
+
                lradc: lradc@01c22800 {
                        compatible = "allwinner,sun4i-a10-lradc-keys";
                        reg = <0x01c22800 0x100>;
                                     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
                };
 
+               nmi_intc: interrupt-controller@01f00c0c {
+                       compatible = "allwinner,sun6i-a31-sc-nmi";
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+                       reg = <0x01f00c0c 0x38>;
+                       interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
                prcm@01f01400 {
                        compatible = "allwinner,sun8i-a23-prcm";
                        reg = <0x01f01400 0x200>;
                        resets = <&apb0_rst 0>;
                        gpio-controller;
                        interrupt-controller;
+                       #interrupt-cells = <3>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        #gpio-cells = <3>;
 
+                       r_rsb_pins: r_rsb {
+                               allwinner,pins = "PL0", "PL1";
+                               allwinner,function = "s_rsb";
+                               allwinner,drive = <SUN4I_PINCTRL_20_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                       };
+
                        r_uart_pins_a: r_uart@0 {
                                allwinner,pins = "PL2", "PL3";
                                allwinner,function = "s_uart";
                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
                        };
                };
+
+               r_rsb: rsb@01f03400 {
+                       compatible = "allwinner,sun8i-a23-rsb";
+                       reg = <0x01f03400 0x400>;
+                       interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&apb0_gates 3>;
+                       clock-frequency = <3000000>;
+                       resets = <&apb0_rst 3>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&r_rsb_pins>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
        };
 };