Merge branch 'master' of git://git.denx.de/u-boot-pmic

[u-boot] / arch / arm / dts / tegra124.dtsi

diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra124.dtsi
index 9fa141d8fe783fe42eeb538ec1cfb354f346800a..43b7f2281440f3f48fb976848bbffa7c5f15b507 100644 (file)
--- a/arch/arm/dts/tegra124.dtsi
+++ b/arch/arm/dts/tegra124.dtsi
@@ -76,6 +76,85 @@
                };
        };
 
+       host1x@50000000 {
+               compatible = "nvidia,tegra124-host1x", "simple-bus";
+               reg = <0x50000000 0x00034000>;
+               interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
+                            <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
+               clocks = <&tegra_car TEGRA124_CLK_HOST1X>;
+               resets = <&tegra_car 28>;
+               reset-names = "host1x";
+
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               ranges = <0x54000000 0x54000000 0x01000000>;
+
+               dc@54200000 {
+                       compatible = "nvidia,tegra124-dc";
+                       reg = <0x54200000 0x00040000>;
+                       interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&tegra_car TEGRA124_CLK_DISP1>,
+                                <&tegra_car TEGRA124_CLK_PLL_P>;
+                       clock-names = "dc", "parent";
+                       resets = <&tegra_car 27>;
+                       reset-names = "dc";
+
+                       nvidia,head = <0>;
+               };
+
+               dc@54240000 {
+                       compatible = "nvidia,tegra124-dc";
+                       reg = <0x54240000 0x00040000>;
+                       interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&tegra_car TEGRA124_CLK_DISP2>,
+                                <&tegra_car TEGRA124_CLK_PLL_P>;
+                       clock-names = "dc", "parent";
+                       resets = <&tegra_car 26>;
+                       reset-names = "dc";
+
+                       nvidia,head = <1>;
+               };
+
+               hdmi@54280000 {
+                       compatible = "nvidia,tegra124-hdmi";
+                       reg = <0x54280000 0x00040000>;
+                       interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&tegra_car TEGRA124_CLK_HDMI>,
+                                <&tegra_car TEGRA124_CLK_PLL_D2_OUT0>;
+                       clock-names = "hdmi", "parent";
+                       resets = <&tegra_car 51>;
+                       reset-names = "hdmi";
+                       status = "disabled";
+               };
+
+               sor@54540000 {
+                       compatible = "nvidia,tegra124-sor";
+                       reg = <0x54540000 0x00040000>;
+                       interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&tegra_car TEGRA124_CLK_SOR0>,
+                                <&tegra_car TEGRA124_CLK_PLL_D_OUT0>,
+                                <&tegra_car TEGRA124_CLK_PLL_DP>,
+                                <&tegra_car TEGRA124_CLK_CLK_M>;
+                       clock-names = "sor", "parent", "dp", "safe";
+                       resets = <&tegra_car 182>;
+                       reset-names = "sor";
+                       status = "disabled";
+               };
+
+               dpaux: dpaux@545c0000 {
+                       compatible = "nvidia,tegra124-dpaux";
+                       reg = <0x545c0000 0x00040000>;
+                       interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&tegra_car TEGRA124_CLK_DPAUX>,
+                                <&tegra_car TEGRA124_CLK_PLL_DP>;
+                       clock-names = "dpaux", "parent";
+                       resets = <&tegra_car 181>;
+                       reset-names = "dpaux";
+                       status = "disabled";
+               };
+       };
+
        gic: interrupt-controller@50041000 {
                compatible = "arm,cortex-a15-gic";
                #interrupt-cells = <3>;
@@ -349,6 +428,11 @@
                clocks = <&tegra_car 105>;
        };
 
+       pmc@7000e400 {
+               compatible = "nvidia,tegra124-pmc";
+               reg = <0x7000e400 0x400>;
+       };
+
        padctl: padctl@7009f000 {
                compatible = "nvidia,tegra124-xusb-padctl";
                reg = <0x7009f000 0x1000>;