ARM: dts: at91: sama5: Add the sfr node

[u-boot] / arch / arm / dts / tegra20-tamonten.dtsi

diff --git a/arch/arm/dts/tegra20-tamonten.dtsi b/arch/arm/dts/tegra20-tamonten.dtsi
index f379622c944963cba0a0c568cac440bc1dc35eb3..f13ef4d05a841772506121e97f91f7aca31ebd67 100644 (file)
--- a/arch/arm/dts/tegra20-tamonten.dtsi
+++ b/arch/arm/dts/tegra20-tamonten.dtsi
@@ -8,13 +8,14 @@
                reg = <0x00000000 0x20000000>;
        };
 
-       host1x {
+       host1x@50000000 {
                hdmi {
                        vdd-supply = <&hdmi_vdd_reg>;
                        pll-supply = <&hdmi_pll_reg>;
 
                        nvidia,ddc-i2c-bus = <&hdmi_ddc>;
-                       nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+                       nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
+                               GPIO_ACTIVE_HIGH>;
                };
        };
 
@@ -280,7 +281,7 @@
        };
 
        nand-controller@70008000 {
-               nvidia,wp-gpios = <&gpio 23 0>; /* PC7 */
+               nvidia,wp-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
                nvidia,width = <8>;
                nvidia,timing = <26 100 20 80 20 10 12 10 70>;
 
@@ -476,12 +477,25 @@
        };
 
        sdhci@c8000600 {
-               cd-gpios = <&gpio 58 1>; /* gpio PH2 */
-               wp-gpios = <&gpio 59 0>; /* gpio PH3 */
+               cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>;
+               wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
                bus-width = <4>;
                status = "okay";
        };
 
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               clk32k_in: clock@0 {
+                       compatible = "fixed-clock";
+                       reg=<0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
+       };
+
        regulators {
                compatible = "simple-bus";