]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/dts/tegra20.dtsi
ARM: keystone2: Fix serial port init
[u-boot] / arch / arm / dts / tegra20.dtsi
index b8c8a923017e081dc43f5f8ba7c0b9a70088b059..e68d7be4785f34cc2d642d84a90c6ee8cb9d11e8 100644 (file)
                clocks = <&tegra_car 47>, <&tegra_car 124>;
        };
 
+       spi@7000d400 {
+               compatible = "nvidia,tegra20-slink";
+               reg = <0x7000d400 0x200>;
+               interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&tegra_car TEGRA20_CLK_SBC1>;
+               resets = <&tegra_car 41>;
+               reset-names = "spi";
+               dmas = <&apbdma 15>, <&apbdma 15>;
+               dma-names = "rx", "tx";
+               status = "disabled";
+       };
+
+       spi@7000d600 {
+               compatible = "nvidia,tegra20-slink";
+               reg = <0x7000d600 0x200>;
+               interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&tegra_car TEGRA20_CLK_SBC2>;
+               resets = <&tegra_car 44>;
+               reset-names = "spi";
+               dmas = <&apbdma 16>, <&apbdma 16>;
+               dma-names = "rx", "tx";
+               status = "disabled";
+       };
+
+       spi@7000d800 {
+               compatible = "nvidia,tegra20-slink";
+               reg = <0x7000d800 0x200>;
+               interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&tegra_car TEGRA20_CLK_SBC3>;
+               resets = <&tegra_car 46>;
+               reset-names = "spi";
+               dmas = <&apbdma 17>, <&apbdma 17>;
+               dma-names = "rx", "tx";
+               status = "disabled";
+       };
+
+       spi@7000da00 {
+               compatible = "nvidia,tegra20-slink";
+               reg = <0x7000da00 0x200>;
+               interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&tegra_car TEGRA20_CLK_SBC4>;
+               resets = <&tegra_car 68>;
+               reset-names = "spi";
+               dmas = <&apbdma 18>, <&apbdma 18>;
+               dma-names = "rx", "tx";
+               status = "disabled";
+       };
+
+
        kbc@7000e200 {
                compatible = "nvidia,tegra20-kbc";
                reg = <0x7000e200 0x0078>;