ARM: at91: asm/at91_pmc.h: fix trival register offset

[u-boot] / arch / arm / dts / uniphier-ph1-ld4.dtsi

diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi b/arch/arm/dts/uniphier-ph1-ld4.dtsi
index ee53d9c194457dde1e1c7e99d2255b7115cd708c..7c8759f929e423b4a9cac6019854662ff478db9b 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi
@@ -1,32 +1,181 @@
 /*
  * Device Tree Source for UniPhier PH1-LD4 SoC
  *
- * Copyright (C) 2014 Panasonic Corporation
- *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
  *
- * SPDX-License-Identifier:    GPL-2.0+
+ * SPDX-License-Identifier:    GPL-2.0+        X11
  */
 
-/include/ "skeleton.dtsi"
+/include/ "uniphier-common32.dtsi"
 
 / {
-       compatible = "panasonic,ph1-ld4";
+       compatible = "socionext,ph1-ld4";
 
        cpus {
-               #size-cells = <0>;
                #address-cells = <1>;
+               #size-cells = <0>;
 
                cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0>;
+                       next-level-cache = <&l2>;
                };
        };
 
-       soc {
-               compatible = "simple-bus";
+       clocks {
+               arm_timer_clk: arm_timer_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <50000000>;
+               };
+
+               uart_clk: uart_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <36864000>;
+               };
+
+               iobus_clk: iobus_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <100000000>;
+               };
+       };
+};
+
+&soc {
+       l2: l2-cache@500c0000 {
+               compatible = "socionext,uniphier-system-cache";
+               reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>;
+               interrupts = <0 174 4>, <0 175 4>;
+               cache-unified;
+               cache-size = <(512 * 1024)>;
+               cache-sets = <256>;
+               cache-line-size = <128>;
+               cache-level = <2>;
+       };
+
+       i2c0: i2c@58400000 {
+               compatible = "socionext,uniphier-i2c";
+               status = "disabled";
+               reg = <0x58400000 0x40>;
                #address-cells = <1>;
-               #size-cells = <1>;
-               ranges;
+               #size-cells = <0>;
+               interrupts = <0 41 1>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_i2c0>;
+               clocks = <&iobus_clk>;
+               clock-frequency = <100000>;
+       };
+
+       i2c1: i2c@58480000 {
+               compatible = "socionext,uniphier-i2c";
+               status = "disabled";
+               reg = <0x58480000 0x40>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               interrupts = <0 42 1>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_i2c1>;
+               clocks = <&iobus_clk>;
+               clock-frequency = <100000>;
+       };
+
+       /* chip-internal connection for DMD */
+       i2c2: i2c@58500000 {
+               compatible = "socionext,uniphier-i2c";
+               reg = <0x58500000 0x40>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               interrupts = <0 43 1>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_i2c2>;
+               clocks = <&iobus_clk>;
+               clock-frequency = <400000>;
+       };
+
+       i2c3: i2c@58580000 {
+               compatible = "socionext,uniphier-i2c";
+               status = "disabled";
+               reg = <0x58580000 0x40>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               interrupts = <0 44 1>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_i2c3>;
+               clocks = <&iobus_clk>;
+               clock-frequency = <100000>;
        };
+
+       usb0: usb@5a800100 {
+               compatible = "socionext,uniphier-ehci", "generic-ehci";
+               status = "disabled";
+               reg = <0x5a800100 0x100>;
+               interrupts = <0 80 4>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_usb0>;
+               clocks = <&mio 3>, <&mio 6>;
+       };
+
+       usb1: usb@5a810100 {
+               compatible = "socionext,uniphier-ehci", "generic-ehci";
+               status = "disabled";
+               reg = <0x5a810100 0x100>;
+               interrupts = <0 81 4>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_usb1>;
+               clocks = <&mio 4>, <&mio 6>;
+       };
+
+       usb2: usb@5a820100 {
+               compatible = "socionext,uniphier-ehci", "generic-ehci";
+               status = "disabled";
+               reg = <0x5a820100 0x100>;
+               interrupts = <0 82 4>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_usb2>;
+               clocks = <&mio 5>, <&mio 6>;
+       };
+};
+
+&refclk {
+       clock-frequency = <24576000>;
+};
+
+&serial0 {
+       clock-frequency = <36864000>;
+};
+
+&serial1 {
+       clock-frequency = <36864000>;
+};
+
+&serial2 {
+       clock-frequency = <36864000>;
+};
+
+&serial3 {
+       interrupts = <0 29 4>;
+       clock-frequency = <36864000>;
+};
+
+&mio {
+       compatible = "socionext,ph1-ld4-mioctrl";
+       clock-names = "stdmac", "ehci";
+       clocks = <&sysctrl 10>, <&sysctrl 18>;
+};
+
+&peri {
+       compatible = "socionext,ph1-ld4-perictrl";
+       clock-names = "uart", "i2c";
+       clocks = <&sysctrl 3>, <&sysctrl 4>;
+};
+
+&pinctrl {
+       compatible = "socionext,ph1-ld4-pinctrl", "syscon";
+};
+
+&sysctrl {
+       compatible = "socionext,ph1-ld4-sysctrl";
 };