OMAP3_LOGIC: Setup defconfig to enable SPL and NAND booting

[u-boot] / arch / arm / dts / uniphier-ph1-pro5.dtsi

diff --git a/arch/arm/dts/uniphier-ph1-pro5.dtsi b/arch/arm/dts/uniphier-ph1-pro5.dtsi
index 876242f81ba22714ef740b2131704a34a8a2ba43..00491062fe74ea99b34530b4e791871128050bbe 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-pro5.dtsi
+++ b/arch/arm/dts/uniphier-ph1-pro5.dtsi
@@ -20,12 +20,14 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0>;
+                       next-level-cache = <&l2>;
                };
 
                cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <1>;
+                       next-level-cache = <&l2>;
                };
        };
 
@@ -51,6 +53,29 @@
 };
 
 &soc {
+       l2: l2-cache@500c0000 {
+               compatible = "socionext,uniphier-system-cache";
+               reg = <0x500c0000 0x2000>, <0x503c0100 0x8>, <0x506c0000 0x400>;
+               interrupts = <0 190 4>, <0 191 4>;
+               cache-unified;
+               cache-size = <(2 * 1024 * 1024)>;
+               cache-sets = <512>;
+               cache-line-size = <128>;
+               cache-level = <2>;
+               next-level-cache = <&l3>;
+       };
+
+       l3: l3-cache@500c8000 {
+               compatible = "socionext,uniphier-system-cache";
+               reg = <0x500c8000 0x2000>, <0x503c8100 0x8>, <0x506c8000 0x400>;
+               interrupts = <0 174 4>, <0 175 4>;
+               cache-unified;
+               cache-size = <(2 * 1024 * 1024)>;
+               cache-sets = <512>;
+               cache-line-size = <256>;
+               cache-level = <3>;
+       };
+
        i2c0: i2c@58780000 {
                compatible = "socionext,uniphier-fi2c";
                status = "disabled";
@@ -131,18 +156,18 @@
                compatible = "socionext,uniphier-xhci", "generic-xhci";
                status = "disabled";
                reg = <0x65a00000 0x100>;
+               interrupts = <0 134 4>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_usb0>;
-               interrupts = <0 134 4>;
        };
 
        usb1: usb@65c00000 {
                compatible = "socionext,uniphier-xhci", "generic-xhci";
                status = "disabled";
                reg = <0x65c00000 0x100>;
+               interrupts = <0 137 4>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb2>;
-               interrupts = <0 137 4>;
        };
 };