};
clocks {
- arm_timer_clk: arm_timer_clk {
+ refclk: ref {
#clock-cells = <0>;
compatible = "fixed-clock";
- clock-frequency = <50000000>;
+ clock-frequency = <24576000>;
};
- uart_clk: uart_clk {
+ arm_timer_clk: arm_timer_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
- clock-frequency = <36864000>;
+ clock-frequency = <50000000>;
};
iobus_clk: iobus_clk {
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
-
- extbus: extbus {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <1>;
- };
+ u-boot,dm-pre-reloc;
timer@20000200 {
compatible = "arm,cortex-a9-global-timer";
status = "disabled";
reg = <0x54006800 0x40>;
interrupts = <0 33 4>;
- clocks = <&uart_clk>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart0>;
clock-frequency = <36864000>;
};
status = "disabled";
reg = <0x54006900 0x40>;
interrupts = <0 35 4>;
- clocks = <&uart_clk>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
clock-frequency = <36864000>;
};
status = "disabled";
reg = <0x54006a00 0x40>;
interrupts = <0 37 4>;
- clocks = <&uart_clk>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
clock-frequency = <36864000>;
};
+ port0x: gpio@55000008 {
+ compatible = "socionext,uniphier-gpio";
+ reg = <0x55000008 0x8>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ port1x: gpio@55000010 {
+ compatible = "socionext,uniphier-gpio";
+ reg = <0x55000010 0x8>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ port2x: gpio@55000018 {
+ compatible = "socionext,uniphier-gpio";
+ reg = <0x55000018 0x8>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ port3x: gpio@55000020 {
+ compatible = "socionext,uniphier-gpio";
+ reg = <0x55000020 0x8>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ port4: gpio@55000028 {
+ compatible = "socionext,uniphier-gpio";
+ reg = <0x55000028 0x8>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ port5x: gpio@55000030 {
+ compatible = "socionext,uniphier-gpio";
+ reg = <0x55000030 0x8>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ port6x: gpio@55000038 {
+ compatible = "socionext,uniphier-gpio";
+ reg = <0x55000038 0x8>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ port7x: gpio@55000040 {
+ compatible = "socionext,uniphier-gpio";
+ reg = <0x55000040 0x8>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ port8x: gpio@55000048 {
+ compatible = "socionext,uniphier-gpio";
+ reg = <0x55000048 0x8>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ port9x: gpio@55000050 {
+ compatible = "socionext,uniphier-gpio";
+ reg = <0x55000050 0x8>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ port10x: gpio@55000058 {
+ compatible = "socionext,uniphier-gpio";
+ reg = <0x55000058 0x8>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ port11x: gpio@55000060 {
+ compatible = "socionext,uniphier-gpio";
+ reg = <0x55000060 0x8>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ port12x: gpio@55000068 {
+ compatible = "socionext,uniphier-gpio";
+ reg = <0x55000068 0x8>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ port13x: gpio@55000070 {
+ compatible = "socionext,uniphier-gpio";
+ reg = <0x55000070 0x8>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ port14x: gpio@55000078 {
+ compatible = "socionext,uniphier-gpio";
+ reg = <0x55000078 0x8>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ port16x: gpio@55000088 {
+ compatible = "socionext,uniphier-gpio";
+ reg = <0x55000088 0x8>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
i2c0: i2c@58400000 {
compatible = "socionext,uniphier-i2c";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 41 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0>;
clocks = <&iobus_clk>;
clock-frequency = <100000>;
};
clock-frequency = <400000>;
};
- system-bus-controller-misc@59800000 {
- compatible = "socionext,uniphier-system-bus-controller-misc",
- "syscon";
- reg = <0x59800000 0x2000>;
+ system_bus: system-bus@58c00000 {
+ compatible = "socionext,uniphier-system-bus";
+ reg = <0x58c00000 0x400>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ };
+
+ smpctrl@59800000 {
+ compatible = "socionext,uniphier-smpctrl";
+ reg = <0x59801000 0x400>;
+ };
+
+ mioctrl@59810000 {
+ compatible = "socionext,uniphier-mioctrl",
+ "simple-mfd", "syscon";
+ reg = <0x59810000 0x800>;
+ u-boot,dm-pre-reloc;
+
+ mio_clk: clock {
+ compatible = "socionext,uniphier-sld3-mio-clock";
+ #clock-cells = <1>;
+ u-boot,dm-pre-reloc;
+ };
+
+ mio_rst: reset {
+ compatible = "socionext,uniphier-sld3-mio-reset";
+ #reset-cells = <1>;
+ };
+ };
+
+ emmc: sdhc@5a400000 {
+ compatible = "socionext,uniphier-sdhc";
+ status = "disabled";
+ reg = <0x5a400000 0x200>;
+ interrupts = <0 78 4>;
+ pinctrl-names = "default", "1.8v";
+ pinctrl-0 = <&pinctrl_emmc>;
+ pinctrl-1 = <&pinctrl_emmc_1v8>;
+ clocks = <&mio_clk 1>;
+ bus-width = <8>;
+ non-removable;
+ };
+
+ sd: sdhc@5a500000 {
+ compatible = "socionext,uniphier-sdhc";
+ status = "disabled";
+ reg = <0x5a500000 0x200>;
+ interrupts = <0 76 4>;
+ pinctrl-names = "default", "1.8v";
+ pinctrl-0 = <&pinctrl_sd>;
+ pinctrl-1 = <&pinctrl_sd_1v8>;
+ clocks = <&mio_clk 0>;
+ bus-width = <4>;
};
usb0: usb@5a800100 {
status = "disabled";
reg = <0x5a800100 0x100>;
interrupts = <0 80 4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb0>;
+ clocks = <&mio_clk 3>, <&mio_clk 6>;
};
usb1: usb@5a810100 {
status = "disabled";
reg = <0x5a810100 0x100>;
interrupts = <0 81 4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb1>;
+ clocks = <&mio_clk 4>, <&mio_clk 6>;
};
usb2: usb@5a820100 {
status = "disabled";
reg = <0x5a820100 0x100>;
interrupts = <0 82 4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb2>;
+ clocks = <&mio_clk 5>, <&mio_clk 6>;
};
usb3: usb@5a830100 {
status = "disabled";
reg = <0x5a830100 0x100>;
interrupts = <0 83 4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb3>;
+ clocks = <&mio_clk 7>, <&mio_clk 6>;
+ };
+
+ soc-glue@5f800000 {
+ compatible = "simple-mfd", "syscon";
+ reg = <0x5f800000 0x2000>;
+ u-boot,dm-pre-reloc;
+
+ pinctrl: pinctrl {
+ compatible = "socionext,uniphier-sld3-pinctrl";
+ u-boot,dm-pre-reloc;
+ };
+ };
+
+ aidet@f1830000 {
+ compatible = "simple-mfd", "syscon";
+ reg = <0xf1830000 0x200>;
+ };
+
+ sysctrl@f1840000 {
+ compatible = "socionext,uniphier-sysctrl",
+ "simple-mfd", "syscon";
+ reg = <0xf1840000 0x4000>;
+
+ sys_clk: clock {
+ compatible = "socionext,uniphier-sld3-clock";
+ #clock-cells = <1>;
+ };
+
+ sys_rst: reset {
+ compatible = "socionext,uniphier-sld3-reset";
+ #reset-cells = <1>;
+ };
};
nand: nand@f8000000 {
};
};
};
+
+/include/ "uniphier-pinctrl.dtsi"