arm64: mvebu: armada-7040-db.dts: Add I2C and SPI aliases

[u-boot] / arch / arm / dts / uniphier-ph1-sld8.dtsi

diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi
index 9d97fb03a06a24307aa72fbbce4cccbb7283e92c..1ecce5030f65eb5e9b7329d653c5c0d1a7aaf422 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi
@@ -30,12 +30,6 @@
                        clock-frequency = <50000000>;
                };
 
-               uart_clk: uart_clk {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <80000000>;
-               };
-
                iobus_clk: iobus_clk {
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
@@ -56,6 +50,118 @@
                cache-level = <2>;
        };
 
+       port0x: gpio@55000008 {
+               compatible = "socionext,uniphier-gpio";
+               reg = <0x55000008 0x8>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       port1x: gpio@55000010 {
+               compatible = "socionext,uniphier-gpio";
+               reg = <0x55000010 0x8>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       port2x: gpio@55000018 {
+               compatible = "socionext,uniphier-gpio";
+               reg = <0x55000018 0x8>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       port3x: gpio@55000020 {
+               compatible = "socionext,uniphier-gpio";
+               reg = <0x55000020 0x8>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       port4: gpio@55000028 {
+               compatible = "socionext,uniphier-gpio";
+               reg = <0x55000028 0x8>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       port5x: gpio@55000030 {
+               compatible = "socionext,uniphier-gpio";
+               reg = <0x55000030 0x8>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       port6x: gpio@55000038 {
+               compatible = "socionext,uniphier-gpio";
+               reg = <0x55000038 0x8>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       port7x: gpio@55000040 {
+               compatible = "socionext,uniphier-gpio";
+               reg = <0x55000040 0x8>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       port8x: gpio@55000048 {
+               compatible = "socionext,uniphier-gpio";
+               reg = <0x55000048 0x8>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       port9x: gpio@55000050 {
+               compatible = "socionext,uniphier-gpio";
+               reg = <0x55000050 0x8>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       port10x: gpio@55000058 {
+               compatible = "socionext,uniphier-gpio";
+               reg = <0x55000058 0x8>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       port11x: gpio@55000060 {
+               compatible = "socionext,uniphier-gpio";
+               reg = <0x55000060 0x8>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       port12x: gpio@55000068 {
+               compatible = "socionext,uniphier-gpio";
+               reg = <0x55000068 0x8>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       port13x: gpio@55000070 {
+               compatible = "socionext,uniphier-gpio";
+               reg = <0x55000070 0x8>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       port14x: gpio@55000078 {
+               compatible = "socionext,uniphier-gpio";
+               reg = <0x55000078 0x8>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       port16x: gpio@55000088 {
+               compatible = "socionext,uniphier-gpio";
+               reg = <0x55000088 0x8>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
        i2c0: i2c@58400000 {
                compatible = "socionext,uniphier-i2c";
                status = "disabled";
@@ -108,6 +214,31 @@
                clock-frequency = <100000>;
        };
 
+       sd: sdhc@5a400000 {
+               compatible = "socionext,uniphier-sdhc";
+               status = "disabled";
+               reg = <0x5a400000 0x200>;
+               interrupts = <0 76 4>;
+               pinctrl-names = "default", "1.8v";
+               pinctrl-0 = <&pinctrl_sd>;
+               pinctrl-1 = <&pinctrl_sd_1v8>;
+               clocks = <&mio_clk 0>;
+               bus-width = <4>;
+       };
+
+       emmc: sdhc@5a500000 {
+               compatible = "socionext,uniphier-sdhc";
+               status = "disabled";
+               interrupts = <0 78 4>;
+               reg = <0x5a500000 0x200>;
+               pinctrl-names = "default", "1.8v";
+               pinctrl-0 = <&pinctrl_emmc>;
+               pinctrl-1 = <&pinctrl_emmc_1v8>;
+               clocks = <&mio_clk 1>;
+               bus-width = <8>;
+               non-removable;
+       };
+
        usb0: usb@5a800100 {
                compatible = "socionext,uniphier-ehci", "generic-ehci";
                status = "disabled";
@@ -115,6 +246,7 @@
                interrupts = <0 80 4>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_usb0>;
+               clocks = <&mio_clk 3>, <&mio_clk 6>;
        };
 
        usb1: usb@5a810100 {
@@ -124,6 +256,7 @@
                interrupts = <0 81 4>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_usb1>;
+               clocks = <&mio_clk 4>, <&mio_clk 6>;
        };
 
        usb2: usb@5a820100 {
@@ -133,6 +266,12 @@
                interrupts = <0 82 4>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_usb2>;
+               clocks = <&mio_clk 5>, <&mio_clk 6>;
+       };
+
+       aidet@61830000 {
+               compatible = "simple-mfd", "syscon";
+               reg = <0x61830000 0x200>;
        };
 };
 
@@ -157,10 +296,30 @@
        clock-frequency = <80000000>;
 };
 
+&mio_clk {
+       compatible = "socionext,uniphier-sld8-mio-clock";
+};
+
+&mio_rst {
+       compatible = "socionext,uniphier-sld8-mio-reset";
+};
+
+&peri_clk {
+       compatible = "socionext,uniphier-sld8-peri-clock";
+};
+
+&peri_rst {
+       compatible = "socionext,uniphier-sld8-peri-reset";
+};
+
 &pinctrl {
-       compatible = "socionext,ph1-sld8-pinctrl", "syscon";
+       compatible = "socionext,uniphier-sld8-pinctrl";
+};
+
+&sys_clk {
+       compatible = "socionext,uniphier-sld8-clock";
 };
 
-&sysctrl {
-       compatible = "socionext,ph1-sld8-sysctrl";
+&sys_rst {
+       compatible = "socionext,uniphier-sld8-reset";
 };