OMAP3_LOGIC: Setup defconfig to enable SPL and NAND booting

[u-boot] / arch / arm / dts / uniphier-ph1-sld8.dtsi

diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi
index bafe343b78445d69eec110b94e99fa716438efe7..cb28bc4508252ebb5517c9d5416c37ff15467131 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi
@@ -19,6 +19,7 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0>;
+                       next-level-cache = <&l2>;
                };
        };
 
@@ -44,6 +45,17 @@
 };
 
 &soc {
+       l2: l2-cache@500c0000 {
+               compatible = "socionext,uniphier-system-cache";
+               reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>;
+               interrupts = <0 174 4>, <0 175 4>;
+               cache-unified;
+               cache-size = <(256 * 1024)>;
+               cache-sets = <256>;
+               cache-line-size = <128>;
+               cache-level = <2>;
+       };
+
        i2c0: i2c@58400000 {
                compatible = "socionext,uniphier-i2c";
                status = "disabled";