/*
* Device Tree Source for UniPhier SoCs default pinctrl settings
*
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2015-2017 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
- * SPDX-License-Identifier: GPL-2.0+ X11
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
&pinctrl {
function = "i2c3";
};
+ pinctrl_i2c4: i2c4_grp {
+ groups = "i2c4";
+ function = "i2c4";
+ };
+
+ pinctrl_nand: nand_grp {
+ groups = "nand";
+ function = "nand";
+ };
+
+ pinctrl_nand2cs: nand2cs_grp {
+ groups = "nand", "nand_cs1";
+ function = "nand";
+ };
+
pinctrl_sd: sd_grp {
groups = "sd";
function = "sd";
function = "sd1";
};
+ pinctrl_system_bus: system_bus_grp {
+ groups = "system_bus", "system_bus_cs1";
+ function = "system_bus";
+ };
+
pinctrl_uart0: uart0_grp {
groups = "uart0";
function = "uart0";