OMAP3_LOGIC: Setup defconfig to enable SPL and NAND booting

[u-boot] / arch / arm / dts / uniphier-proxstream2.dtsi

diff --git a/arch/arm/dts/uniphier-proxstream2.dtsi b/arch/arm/dts/uniphier-proxstream2.dtsi
index cb7df8d46093f21f7ca3e448ce7f8887ad5dd998..3ba6a4ae51d57b8f0867b3cc2484306d552cf391 100644 (file)
--- a/arch/arm/dts/uniphier-proxstream2.dtsi
+++ b/arch/arm/dts/uniphier-proxstream2.dtsi
@@ -20,24 +20,28 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0>;
+                       next-level-cache = <&l2>;
                };
 
                cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <1>;
+                       next-level-cache = <&l2>;
                };
 
                cpu@2 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <2>;
+                       next-level-cache = <&l2>;
                };
 
                cpu@3 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <3>;
+                       next-level-cache = <&l2>;
                };
        };
 
@@ -63,6 +67,17 @@
 };
 
 &soc {
+       l2: l2-cache@500c0000 {
+               compatible = "socionext,uniphier-system-cache";
+               reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>;
+               interrupts = <0 174 4>, <0 175 4>, <0 190 4>, <0 191 4>;
+               cache-unified;
+               cache-size = <(1280 * 1024)>;
+               cache-sets = <512>;
+               cache-line-size = <128>;
+               cache-level = <2>;
+       };
+
        i2c0: i2c@58780000 {
                compatible = "socionext,uniphier-fi2c";
                status = "disabled";
@@ -152,18 +167,18 @@
                compatible = "socionext,uniphier-xhci", "generic-xhci";
                status = "disabled";
                reg = <0x65a00000 0x100>;
+               interrupts = <0 134 4>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
-               interrupts = <0 134 4>;
        };
 
        usb1: usb@65c00000 {
                compatible = "socionext,uniphier-xhci", "generic-xhci";
                status = "disabled";
                reg = <0x65c00000 0x100>;
+               interrupts = <0 137 4>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
-               interrupts = <0 137 4>;
        };
 };