]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/dts/uniphier-pxs2.dtsi
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
[u-boot] / arch / arm / dts / uniphier-pxs2.dtsi
index da62070b74b509283a92ca791ce974548d9c0f0e..6cd3a93b5814973206aa5ba760d1c454a02f4901 100644 (file)
@@ -4,13 +4,49 @@
  * Copyright (C) 2015-2016 Socionext Inc.
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
- * SPDX-License-Identifier:    GPL-2.0+        X11
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
-/include/ "skeleton.dtsi"
-
 / {
        compatible = "socionext,uniphier-pxs2";
+       #address-cells = <1>;
+       #size-cells = <1>;
 
        cpus {
                #address-cells = <1>;
                compatible = "operating-points-v2";
                opp-shared;
 
-               opp@100000000 {
+               opp-100000000 {
                        opp-hz = /bits/ 64 <100000000>;
                        clock-latency-ns = <300>;
                };
-               opp@150000000 {
+               opp-150000000 {
                        opp-hz = /bits/ 64 <150000000>;
                        clock-latency-ns = <300>;
                };
-               opp@200000000 {
+               opp-200000000 {
                        opp-hz = /bits/ 64 <200000000>;
                        clock-latency-ns = <300>;
                };
-               opp@300000000 {
+               opp-300000000 {
                        opp-hz = /bits/ 64 <300000000>;
                        clock-latency-ns = <300>;
                };
-               opp@400000000 {
+               opp-400000000 {
                        opp-hz = /bits/ 64 <400000000>;
                        clock-latency-ns = <300>;
                };
-               opp@600000000 {
+               opp-600000000 {
                        opp-hz = /bits/ 64 <600000000>;
                        clock-latency-ns = <300>;
                };
-               opp@800000000 {
+               opp-800000000 {
                        opp-hz = /bits/ 64 <800000000>;
                        clock-latency-ns = <300>;
                };
-               opp@1200000000 {
+               opp-1200000000 {
                        opp-hz = /bits/ 64 <1200000000>;
                        clock-latency-ns = <300>;
                };
                        compatible = "fixed-clock";
                        clock-frequency = <50000000>;
                };
-
-               i2c_clk: i2c_clk {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <50000000>;
-               };
        };
 
        soc {
                        interrupts = <0 41 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_i2c0>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 4>;
                        clock-frequency = <100000>;
                };
 
                        interrupts = <0 42 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_i2c1>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 5>;
                        clock-frequency = <100000>;
                };
 
                        interrupts = <0 43 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_i2c2>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 6>;
                        clock-frequency = <100000>;
                };
 
                        interrupts = <0 44 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_i2c3>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 7>;
                        clock-frequency = <100000>;
                };
 
                        #address-cells = <1>;
                        #size-cells = <0>;
                        interrupts = <0 45 4>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 8>;
                        clock-frequency = <400000>;
                };
 
                        #address-cells = <1>;
                        #size-cells = <0>;
                        interrupts = <0 25 4>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 9>;
                        clock-frequency = <400000>;
                };
 
                        #address-cells = <1>;
                        #size-cells = <0>;
                        interrupts = <0 26 4>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 10>;
                        clock-frequency = <400000>;
                };
 
                sysctrl@61840000 {
                        compatible = "socionext,uniphier-pxs2-sysctrl",
                                     "simple-mfd", "syscon";
-                       reg = <0x61840000 0x4000>;
+                       reg = <0x61840000 0x10000>;
 
                        sys_clk: clock {
                                compatible = "socionext,uniphier-pxs2-clock";
                };
 
                nand: nand@68000000 {
-                       compatible = "socionext,denali-nand-v5b";
+                       compatible = "socionext,uniphier-denali-nand-v5b";
                        status = "disabled";
                        reg-names = "nand_data", "denali_reg";
                        reg = <0x68000000 0x20>, <0x68100000 0x1000>;