]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/dts/zynq-7000.dtsi
ARM: zynq: DT: Add pinctrl node
[u-boot] / arch / arm / dts / zynq-7000.dtsi
index d212b60ca6b264cea8e4cfb43a00c9d7684ad67c..109b7dc4dbe988475b7d7a5a96cb8037bc8a1491 100644 (file)
                intc: interrupt-controller@f8f01000 {
                        compatible = "arm,cortex-a9-gic";
                        #interrupt-cells = <3>;
-                       #address-cells = <1>;
                        interrupt-controller;
                        reg = <0xF8F01000 0x1000>,
                              <0xF8F00100 0x100>;
                };
 
                gem0: ethernet@e000b000 {
-                       compatible = "cdns,gem";
-                       reg = <0xe000b000 0x4000>;
+                       compatible = "cdns,zynq-gem", "cdns,gem";
+                       reg = <0xe000b000 0x1000>;
                        status = "disabled";
                        interrupts = <0 22 4>;
                        clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;
                        clock-names = "pclk", "hclk", "tx_clk";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
 
                gem1: ethernet@e000c000 {
-                       compatible = "cdns,gem";
-                       reg = <0xe000c000 0x4000>;
+                       compatible = "cdns,zynq-gem", "cdns,gem";
+                       reg = <0xe000c000 0x1000>;
                        status = "disabled";
                        interrupts = <0 45 4>;
                        clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>;
                        clock-names = "pclk", "hclk", "tx_clk";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
 
                sdhci0: sdhci@e0100000 {
                slcr: slcr@f8000000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
-                       compatible = "xlnx,zynq-slcr", "syscon";
+                       compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";
                        reg = <0xF8000000 0x1000>;
                        ranges;
                        clkc: clkc@100 {
                                                "dbg_trc", "dbg_apb";
                                reg = <0x100 0x100>;
                        };
+
+                       pinctrl0: pinctrl@700 {
+                               compatible = "xlnx,pinctrl-zynq";
+                               reg = <0x700 0x200>;
+                               syscon = <&slcr>;
+                       };
                };
 
                dmac_s: dmac@f8003000 {
 
                ttc0: timer@f8001000 {
                        interrupt-parent = <&intc>;
-                       interrupts = < 0 10 4 0 11 4 0 12 4 >;
+                       interrupts = <0 10 4>, <0 11 4>, <0 12 4>;
                        compatible = "cdns,ttc";
                        clocks = <&clkc 6>;
                        reg = <0xF8001000 0x1000>;
 
                ttc1: timer@f8002000 {
                        interrupt-parent = <&intc>;
-                       interrupts = < 0 37 4 0 38 4 0 39 4 >;
+                       interrupts = <0 37 4>, <0 38 4>, <0 39 4>;
                        compatible = "cdns,ttc";
                        clocks = <&clkc 6>;
                        reg = <0xF8002000 0x1000>;