ARM: tegra: fix Tegra186 DT GPIO binding header

[u-boot] / arch / arm / dts / zynq-7000.dtsi

diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 83be51ae9df65ee8c35d406d58d6dffaf25240b3..b618a3f484f0e507948bdff1017cc01ec40a4e26 100644 (file)
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -96,8 +96,10 @@
                gpio0: gpio@e000a000 {
                        compatible = "xlnx,zynq-gpio-1.0";
                        #gpio-cells = <2>;
+                       #interrupt-cells = <2>;
                        clocks = <&clkc 42>;
                        gpio-controller;
+                       interrupt-controller;
                        interrupt-parent = <&intc>;
                        interrupts = <0 20 4>;
                        reg = <0xe000a000 0x1000>;
@@ -234,7 +236,7 @@
                        interrupt-parent = <&intc>;
                        interrupts = <0 24 4>;
                        reg = <0xe0100000 0x1000>;
-               } ;
+               };
 
                sdhci1: sdhci@e0101000 {
                        compatible = "arasan,sdhci-8.9a";
@@ -244,12 +246,12 @@
                        interrupt-parent = <&intc>;
                        interrupts = <0 47 4>;
                        reg = <0xe0101000 0x1000>;
-               } ;
+               };
 
                slcr: slcr@f8000000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
-                       compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";
+                       compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd";
                        reg = <0xF8000000 0x1000>;
                        ranges;
                        clkc: clkc@100 {
@@ -270,6 +272,13 @@
                                reg = <0x100 0x100>;
                        };
 
+                       rstc: rstc@200 {
+                               compatible = "xlnx,zynq-reset";
+                               reg = <0x200 0x48>;
+                               #reset-cells = <1>;
+                               syscon = <&slcr>;
+                       };
+
                        pinctrl0: pinctrl@700 {
                                compatible = "xlnx,pinctrl-zynq";
                                reg = <0x700 0x200>;
@@ -297,7 +306,12 @@
 
                devcfg: devcfg@f8007000 {
                        compatible = "xlnx,zynq-devcfg-1.0";
+                       interrupt-parent = <&intc>;
+                       interrupts = <0 8 4>;
                        reg = <0xf8007000 0x100>;
+                       clocks = <&clkc 12>, <&clkc 15>, <&clkc 16>, <&clkc 17>, <&clkc 18>;
+                       clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
+                       syscon = <&slcr>;
                };
 
                global_timer: timer@f8f00200 {
@@ -326,11 +340,11 @@
 
                scutimer: timer@f8f00600 {
                        interrupt-parent = <&intc>;
-                       interrupts = < 1 13 0x301 >;
+                       interrupts = <1 13 0x301>;
                        compatible = "arm,cortex-a9-twd-timer";
-                       reg = < 0xf8f00600 0x20 >;
+                       reg = <0xf8f00600 0x20>;
                        clocks = <&clkc 4>;
-               } ;
+               };
 
                usb0: usb@e0002000 {
                        compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";