};
};
+ fpga_full: fpga-full {
+ compatible = "fpga-region";
+ fpga-mgr = <&devcfg>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ };
+
pmu@f8891000 {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 5 4>, <0 6 4>;
interrupts = <0 26 4>;
clocks = <&clkc 25>, <&clkc 34>;
clock-names = "ref_clk", "pclk";
- spi-max-frequency = <166666700>;
#address-cells = <1>;
#size-cells = <0>;
};
interrupts = <0 49 4>;
clocks = <&clkc 26>, <&clkc 35>;
clock-names = "ref_clk", "pclk";
- spi-max-frequency = <166666700>;
#address-cells = <1>;
#size-cells = <0>;
};
};
slcr: slcr@f8000000 {
+ u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd";
reg = <0xF8000000 0x1000>;
ranges;
clkc: clkc@100 {
+ u-boot,dm-pre-reloc;
#clock-cells = <1>;
compatible = "xlnx,ps7-clkc";
fclk-enable = <0>;