]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/dts/zynqmp-ep108.dts
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
[u-boot] / arch / arm / dts / zynqmp-ep108.dts
index 1928b0bca002ecb416112aa1f00fae16908829f4..9f6b11180e76b3a07d2d5f4aee55fb34a2b68ae0 100644 (file)
        };
 
        chosen {
+               bootargs = "earlycon";
                stdout-path = "serial0:115200n8";
        };
 
-       memory {
+       memory@0 {
                device_type = "memory";
-               reg = <0x0 0x0 0x40000000>;
+               reg = <0x0 0x0 0x0 0x40000000>;
        };
 };
 
        status = "okay";
 };
 
+&can1 {
+       status = "okay";
+};
+
 &gem0 {
        status = "okay";
        phy-handle = <&phy0>;
        };
 };
 
+&nand0 {
+       status = "okay";
+       arasan,has-mdma;
+       num-cs = <1>;
+
+       partition@0 {   /* for testing purpose */
+               label = "nand-fsbl-uboot";
+               reg = <0x0 0x0 0x400000>;
+       };
+       partition@1 {   /* for testing purpose */
+               label = "nand-linux";
+               reg = <0x0 0x400000 0x1400000>;
+       };
+       partition@2 {   /* for testing purpose */
+               label = "nand-device-tree";
+               reg = <0x0 0x1800000 0x400000>;
+       };
+       partition@3 {   /* for testing purpose */
+               label = "nand-rootfs";
+               reg = <0x0 0x1C00000 0x1400000>;
+       };
+       partition@4 {   /* for testing purpose */
+               label = "nand-bitstream";
+               reg = <0x0 0x3000000 0x400000>;
+       };
+       partition@5 {   /* for testing purpose */
+               label = "nand-misc";
+               reg = <0x0 0x3400000 0xFCC00000>;
+       };
+};
+
 &qspi {
        status = "okay";
        flash@0 {
 &sata {
        status = "okay";
        ceva,broken-gen2;
+       /* SATA Phy OOB timing settings */
+       ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
+       ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
+       ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
+       ceva,p0-retry-params = /bits/ 16 <0x0216 0x7F06>;
+       ceva,p1-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
+       ceva,p1-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
+       ceva,p1-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
+       ceva,p1-retry-params = /bits/ 16 <0x0216 0x7F06>;
 };
 
 &sdhci0 {
        status = "okay";
        bus-width = <8>;
+       xlnx,mio_bank = <2>;
 };
 
 &sdhci1 {
        status = "okay";
+       xlnx,mio_bank = <1>;
 };
 
 &spi0 {