Merge branch 'master' of git://git.denx.de/u-boot-sunxi

[u-boot] / arch / arm / dts / zynqmp-zc1751-xm018-dc4.dts

diff --git a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
index 799b87a04c13ed11d6337eee34f8de1e36692ab0..fb49b4fcb4921e157323e30f5d86f1ead93e6acc 100644 (file)
--- a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
@@ -1,17 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * dts file for Xilinx ZynqMP zc1751-xm018-dc4
  *
- * (C) Copyright 2015 - 2016, Xilinx, Inc.
+ * (C) Copyright 2015 - 2018, Xilinx, Inc.
  *
  * Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /dts-v1/;
 
 #include "zynqmp.dtsi"
-#include "zynqmp-clk.dtsi"
+#include "zynqmp-clk-ccf.dtsi"
 
 / {
        model = "ZynqMP zc1751-xm018-dc4";
@@ -52,19 +51,12 @@
        status = "okay";
 };
 
-/* fpd_dma clk 667MHz, lpd_dma 500MHz */
 &fpd_dma_chan1 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
-       xlnx,overfetch; /* for testing purpose */
-       xlnx,ratectrl = <0>; /* for testing purpose */
-       xlnx,src-issue = <31>;
 };
 
 &fpd_dma_chan2 {
        status = "okay";
-       xlnx,ratectrl = <100>; /* for testing purpose */
-       xlnx,src-issue = <4>; /* for testing purpose */
 };
 
 &fpd_dma_chan3 {
@@ -73,7 +65,6 @@
 
 &fpd_dma_chan4 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &fpd_dma_chan5 {
@@ -82,7 +73,6 @@
 
 &fpd_dma_chan6 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &fpd_dma_chan7 {
@@ -91,7 +81,6 @@
 
 &fpd_dma_chan8 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &lpd_dma_chan1 {