#ifdef CONFIG_IOMUX_LPSR
u32 lpsr = (pad & MUX_MODE_LPSR) >> MUX_MODE_SHIFT;
+#ifdef CONFIG_MX7
if (lpsr == IOMUX_CONFIG_LPSR) {
base = (void *)IOMUXC_LPSR_BASE_ADDR;
mux_mode &= ~IOMUX_CONFIG_LPSR;
if (sel_input_ofs)
sel_input_ofs += IOMUX_LPSR_SEL_INPUT_OFS;
}
+#else
+ if (is_mx6ull()) {
+ if (lpsr == IOMUX_CONFIG_LPSR) {
+ base = (void *)IOMUXC_SNVS_BASE_ADDR;
+ mux_mode &= ~IOMUX_CONFIG_LPSR;
+ }
+ }
+#endif
#endif
- if (is_soc_type(MXC_SOC_MX7) || mux_ctrl_ofs)
+ if (is_soc_type(MXC_SOC_MX7) || is_cpu_type(MXC_CPU_MX6ULL) || mux_ctrl_ofs)
__raw_writel(mux_mode, base + mux_ctrl_ofs);
if (sel_input_ofs)