]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/imx-common/iomux-v3.c
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
[u-boot] / arch / arm / imx-common / iomux-v3.c
index 9b9cf58b75694d25a6564cf9960b28f82f519ffb..392f4bcb992af958cafb20e1b4699ee396c544e8 100644 (file)
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
-#if !defined(CONFIG_MX25) && !defined(CONFIG_VF610)
-#include <asm/arch/sys_proto.h>
-#endif
 #include <asm/imx-common/iomux-v3.h>
+#include <asm/imx-common/sys_proto.h>
 
 static void *base = (void *)IOMUXC_BASE_ADDR;
 
@@ -44,6 +42,7 @@ void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
 #ifdef CONFIG_IOMUX_LPSR
        u32 lpsr = (pad & MUX_MODE_LPSR) >> MUX_MODE_SHIFT;
 
+#ifdef CONFIG_MX7
        if (lpsr == IOMUX_CONFIG_LPSR) {
                base = (void *)IOMUXC_LPSR_BASE_ADDR;
                mux_mode &= ~IOMUX_CONFIG_LPSR;
@@ -51,9 +50,18 @@ void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
                if (sel_input_ofs)
                        sel_input_ofs += IOMUX_LPSR_SEL_INPUT_OFS;
        }
+#else
+       if (is_mx6ull()) {
+               if (lpsr == IOMUX_CONFIG_LPSR) {
+                       base = (void *)IOMUXC_SNVS_BASE_ADDR;
+                       mux_mode &= ~IOMUX_CONFIG_LPSR;
+               }
+       }
+#endif
 #endif
 
-       __raw_writel(mux_mode, base + mux_ctrl_ofs);
+       if (is_soc_type(MXC_SOC_MX7) || is_cpu_type(MXC_CPU_MX6ULL) || mux_ctrl_ofs)
+               __raw_writel(mux_mode, base + mux_ctrl_ofs);
 
        if (sel_input_ofs)
                __raw_writel(sel_input, base + sel_input_ofs);
@@ -84,7 +92,7 @@ void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
 
 #if defined(CONFIG_MX6QDL)
        stride = 2;
-       if (!is_cpu_type(MXC_CPU_MX6Q) && !is_cpu_type(MXC_CPU_MX6D))
+       if (!is_mx6dq() && !is_mx6dqp())
                p += 1;
 #else
        stride = 1;