arm: mvebu: drivers/ddr: Move Armada XP DDR init code into new directory

[u-boot] / arch / arm / imx-common / iomux-v3.c

diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c
index 306183a70ec9159ecba00071334a436b866a1dcb..7fb23dd0271de08ed0101f944c2f0d63da0c49ff 100644 (file)
--- a/arch/arm/imx-common/iomux-v3.c
+++ b/arch/arm/imx-common/iomux-v3.c
@@ -11,7 +11,9 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
+#if !defined(CONFIG_MX25) && !defined(CONFIG_VF610)
 #include <asm/arch/sys_proto.h>
+#endif
 #include <asm/imx-common/iomux-v3.h>
 
 static void *base = (void *)IOMUXC_BASE_ADDR;
@@ -75,3 +77,44 @@ void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
                p += stride;
        }
 }
+
+void imx_iomux_set_gpr_register(int group, int start_bit,
+                                       int num_bits, int value)
+{
+       int i = 0;
+       u32 reg;
+       reg = readl(base + group * 4);
+       while (num_bits) {
+               reg &= ~(1<<(start_bit + i));
+               i++;
+               num_bits--;
+       }
+       reg |= (value << start_bit);
+       writel(reg, base + group * 4);
+}
+
+#ifdef CONFIG_IOMUX_SHARE_CONF_REG
+void imx_iomux_gpio_set_direction(unsigned int gpio,
+                               unsigned int direction)
+{
+       u32 reg;
+       /*
+        * Only on Vybrid the input/output buffer enable flags
+        * are part of the shared mux/conf register.
+        */
+       reg = readl(base + (gpio << 2));
+
+       if (direction)
+               reg |= 0x2;
+       else
+               reg &= ~0x2;
+
+       writel(reg, base + (gpio << 2));
+}
+
+void imx_iomux_gpio_get_function(unsigned int gpio, u32 *gpio_state)
+{
+       *gpio_state = readl(base + (gpio << 2)) &
+               ((0X07 << PAD_MUX_MODE_SHIFT) | PAD_CTL_OBE_IBE_ENABLE);
+}
+#endif