at91: Add support for the AT91 slow clock controller

[u-boot] / arch / arm / imx-common / spl.c

diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c
index 477c38c1e20bc8a111f8310f16ff7e42d85c0214..caa45cfabf5b9231b535fb78be5b1637bbbe7044 100644 (file)
--- a/arch/arm/imx-common/spl.c
+++ b/arch/arm/imx-common/spl.c
@@ -20,7 +20,15 @@ u32 spl_boot_device(void)
        struct src *psrc = (struct src *)SRC_BASE_ADDR;
        unsigned int gpr10_boot = readl(&psrc->gpr10) & (1 << 28);
        unsigned reg = gpr10_boot ? readl(&psrc->gpr9) : readl(&psrc->sbmr1);
+       unsigned int bmode = readl(&psrc->sbmr2);
 
+       /*
+        * Check for BMODE if serial downloader is enabled
+        * BOOT_MODE - see IMX6DQRM Table 8-1
+        */
+       if ((((bmode >> 24) & 0x03)  == 0x01) || /* Serial Downloader */
+               (gpr10_boot && (reg == 1)))
+               return BOOT_DEVICE_UART;
        /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
        switch ((reg & 0x000000FF) >> 4) {
         /* EIM: See 8.5.1, Table 8-9 */
@@ -68,8 +76,10 @@ u32 spl_boot_mode(void)
        /* for MMC return either RAW or FAT mode */
        case BOOT_DEVICE_MMC1:
        case BOOT_DEVICE_MMC2:
-#ifdef CONFIG_SPL_FAT_SUPPORT
+#if defined(CONFIG_SPL_FAT_SUPPORT)
                return MMCSD_MODE_FS;
+#elif defined(CONFIG_SUPPORT_EMMC_BOOT)
+               return MMCSD_MODE_EMMCBOOT;
 #else
                return MMCSD_MODE_RAW;
 #endif