Merge git://git.denx.de/u-boot-pxa

[u-boot] / arch / arm / imx-common / timer.c

diff --git a/arch/arm/imx-common/timer.c b/arch/arm/imx-common/timer.c
index 65ef60bf2edb0a115d7bc48b1eb35dffa0b41901..1a88ce686249c3827bfc0f4354703baf8d9a58f1 100644 (file)
--- a/arch/arm/imx-common/timer.c
+++ b/arch/arm/imx-common/timer.c
@@ -44,8 +44,9 @@ static inline int gpt_has_clk_source_osc(void)
 {
 #if defined(CONFIG_MX6)
        if (((is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) &&
-            (is_soc_rev(CHIP_REV_1_0) > 0)) || is_cpu_type(MXC_CPU_MX6DL) ||
-             is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6SX))
+           (soc_rev() > CHIP_REV_1_0)) || is_cpu_type(MXC_CPU_MX6DL) ||
+            is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6SX) ||
+            is_cpu_type(MXC_CPU_MX6UL))
                return 1;
 
        return 0;
@@ -103,10 +104,11 @@ int timer_init(void)
        if (gpt_has_clk_source_osc()) {
                i |= GPTCR_CLKSOURCE_OSC | GPTCR_TEN;
 
-               /* For DL/S, SX, set 24Mhz OSC Enable bit and prescaler */
+               /* For DL/S, SX, UL, set 24Mhz OSC Enable bit and prescaler */
                if (is_cpu_type(MXC_CPU_MX6DL) ||
                    is_cpu_type(MXC_CPU_MX6SOLO) ||
-                   is_cpu_type(MXC_CPU_MX6SX)) {
+                   is_cpu_type(MXC_CPU_MX6SX) ||
+                   is_cpu_type(MXC_CPU_MX6UL)) {
                        i |= GPTCR_24MEN;
 
                        /* Produce 3Mhz clock */
@@ -176,3 +178,20 @@ ulong get_tbclk(void)
 {
        return gpt_get_clk();
 }
+
+/*
+ * This function is intended for SHORT delays only.
+ * It will overflow at around 10 seconds @ 400MHz,
+ * or 20 seconds @ 200MHz.
+ */
+unsigned long usec2ticks(unsigned long usec)
+{
+       ulong ticks;
+
+       if (usec < 1000)
+               ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
+       else
+               ticks = ((usec / 10) * (get_tbclk() / 100000));
+
+       return ticks;
+}