Merge branch 'master' of git://www.denx.de/git/u-boot-imx

[u-boot] / arch / arm / include / asm / arch-at91 / at91_pio.h

diff --git a/arch/arm/include/asm/arch-at91/at91_pio.h b/arch/arm/include/asm/arch-at91/at91_pio.h
index 0483c9820e5b7634aaa1255d410983c2eec1e792..50464ffe8e239fe7fcac5a6daefd3e0ce5726ebd 100644 (file)
--- a/arch/arm/include/asm/arch-at91/at91_pio.h
+++ b/arch/arm/include/asm/arch-at91/at91_pio.h
@@ -8,10 +8,7 @@
  * Parallel I/O Controller (PIO) - System peripherals registers.
  * Based on AT91RM9200 datasheet revision E.
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef AT91_PIO_H
@@ -154,37 +151,4 @@ int at91_get_pio_value(unsigned port, unsigned pin);
 #define        AT91_PIO_PORTD          0x3
 #define        AT91_PIO_PORTE          0x4
 
-#ifdef CONFIG_AT91_LEGACY
-
-#define PIO_PER                0x00    /* Enable Register */
-#define PIO_PDR                0x04    /* Disable Register */
-#define PIO_PSR                0x08    /* Status Register */
-#define PIO_OER                0x10    /* Output Enable Register */
-#define PIO_ODR                0x14    /* Output Disable Register */
-#define PIO_OSR                0x18    /* Output Status Register */
-#define PIO_IFER       0x20    /* Glitch Input Filter Enable */
-#define PIO_IFDR       0x24    /* Glitch Input Filter Disable */
-#define PIO_IFSR       0x28    /* Glitch Input Filter Status */
-#define PIO_SODR       0x30    /* Set Output Data Register */
-#define PIO_CODR       0x34    /* Clear Output Data Register */
-#define PIO_ODSR       0x38    /* Output Data Status Register */
-#define PIO_PDSR       0x3c    /* Pin Data Status Register */
-#define PIO_IER                0x40    /* Interrupt Enable Register */
-#define PIO_IDR                0x44    /* Interrupt Disable Register */
-#define PIO_IMR                0x48    /* Interrupt Mask Register */
-#define PIO_ISR                0x4c    /* Interrupt Status Register */
-#define PIO_MDER       0x50    /* Multi-driver Enable Register */
-#define PIO_MDDR       0x54    /* Multi-driver Disable Register */
-#define PIO_MDSR       0x58    /* Multi-driver Status Register */
-#define PIO_PUDR       0x60    /* Pull-up Disable Register */
-#define PIO_PUER       0x64    /* Pull-up Enable Register */
-#define PIO_PUSR       0x68    /* Pull-up Status Register */
-#define PIO_ASR                0x70    /* Peripheral A Select Register */
-#define PIO_BSR                0x74    /* Peripheral B Select Register */
-#define PIO_ABSR       0x78    /* AB Status Register */
-#define PIO_OWER       0xa0    /* Output Write Enable Register */
-#define PIO_OWDR       0xa4    /* Output Write Disable Register */
-#define PIO_OWSR       0xa8    /* Output Write Status Register */
-#endif
-
 #endif