#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x01d10000
#define DAVINCI_MMC_SD0_BASE 0x01d11000
#define DAVINCI_DDR_EMIF_CTRL_BASE 0x20000000
+#define DAVINCI_SPI0_BASE 0x01c66000
+#define DAVINCI_SPI1_BASE 0x01c66800
#elif defined(CONFIG_SOC_DM646X)
#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x20008000
#define DAVINCI_SYSCFG_SUSPSRC_I2C (1 << 16)
#define DAVINCI_SYSCFG_SUSPSRC_SPI0 (1 << 21)
#define DAVINCI_SYSCFG_SUSPSRC_SPI1 (1 << 22)
-#define DAVINCI_SYSCFG_SUSPSRC_UART2 (1 << 20)
+#define DAVINCI_SYSCFG_SUSPSRC_UART0 (1 << 18)
#define DAVINCI_SYSCFG_SUSPSRC_TIMER0 (1 << 27)
struct davinci_syscfg1_regs {