Davinci: ea20: set console on UART0

[u-boot] / arch / arm / include / asm / arch-davinci / hardware.h

diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h
index 8e7b847f5315277867c10c9ff39fc3741966f1d8..946c793ab5773a9b9a0b408062ee45e31b7521e5 100644 (file)
--- a/arch/arm/include/asm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
@@ -56,6 +56,7 @@ typedef volatile unsigned int *       dv_reg_p;
 #define DAVINCI_DMA_3PTC1_BASE                 (0x01c10400)
 #define DAVINCI_UART0_BASE                     (0x01c20000)
 #define DAVINCI_UART1_BASE                     (0x01c20400)
+#define DAVINCI_TIMER3_BASE                    (0x01c20800)
 #define DAVINCI_I2C_BASE                       (0x01c21000)
 #define DAVINCI_TIMER0_BASE                    (0x01c21400)
 #define DAVINCI_TIMER1_BASE                    (0x01c21800)
@@ -63,6 +64,7 @@ typedef volatile unsigned int *       dv_reg_p;
 #define DAVINCI_PWM0_BASE                      (0x01c22000)
 #define DAVINCI_PWM1_BASE                      (0x01c22400)
 #define DAVINCI_PWM2_BASE                      (0x01c22800)
+#define DAVINCI_TIMER4_BASE                    (0x01c23800)
 #define DAVINCI_SYSTEM_MODULE_BASE             (0x01c40000)
 #define DAVINCI_PLL_CNTRL0_BASE                        (0x01c40800)
 #define DAVINCI_PLL_CNTRL1_BASE                        (0x01c40c00)
@@ -108,6 +110,9 @@ typedef volatile unsigned int *     dv_reg_p;
 #define DAVINCI_MMC_SD1_BASE                   0x01d00000
 #define DAVINCI_ASYNC_EMIF_CNTRL_BASE          0x01d10000
 #define DAVINCI_MMC_SD0_BASE                   0x01d11000
+#define DAVINCI_DDR_EMIF_CTRL_BASE             0x20000000
+#define DAVINCI_SPI0_BASE                      0x01c66000
+#define DAVINCI_SPI1_BASE                      0x01c66800
 
 #elif defined(CONFIG_SOC_DM646X)
 #define DAVINCI_ASYNC_EMIF_CNTRL_BASE          0x20008000
@@ -260,6 +265,7 @@ typedef volatile unsigned int *     dv_reg_p;
 #define DAVINCI_LPSC_UART2             (DAVINCI_LPSC_PSC1_BASE + 13)
 #define DAVINCI_LPSC_LCDC              (DAVINCI_LPSC_PSC1_BASE + 16)
 #define DAVINCI_LPSC_ePWM              (DAVINCI_LPSC_PSC1_BASE + 17)
+#define DAVINCI_LPSC_MMCSD1            (DAVINCI_LPSC_PSC1_BASE + 18)
 #define DAVINCI_LPSC_eCAP              (DAVINCI_LPSC_PSC1_BASE + 20)
 #define DAVINCI_LPSC_L3_CBA_RAM                (DAVINCI_LPSC_PSC1_BASE + 31)
 
@@ -291,6 +297,7 @@ typedef volatile unsigned int *     dv_reg_p;
 #endif /* CONFIG_SOC_DA8XX */
 
 void lpsc_on(unsigned int id);
+void lpsc_syncreset(unsigned int id);
 void dsp_on(void);
 
 void davinci_enable_uart0(void);
@@ -357,6 +364,7 @@ struct davinci_psc_regs {
 #endif /* CONFIG_SOC_DA8XX */
 
 #define PSC_MDSTAT_STATE               0x3f
+#define PSC_MDCTL_NEXT                 0x07
 
 #ifndef CONFIG_SOC_DA8XX
 
@@ -453,7 +461,7 @@ struct davinci_syscfg_regs {
 #define DAVINCI_SYSCFG_SUSPSRC_I2C             (1 << 16)
 #define DAVINCI_SYSCFG_SUSPSRC_SPI0            (1 << 21)
 #define DAVINCI_SYSCFG_SUSPSRC_SPI1            (1 << 22)
-#define DAVINCI_SYSCFG_SUSPSRC_UART2           (1 << 20)
+#define DAVINCI_SYSCFG_SUSPSRC_UART0           (1 << 18)
 #define DAVINCI_SYSCFG_SUSPSRC_TIMER0          (1 << 27)
 
 struct davinci_syscfg1_regs {
@@ -540,4 +548,14 @@ static inline int get_async3_src(void)
 
 #endif /* CONFIG_SOC_DA8XX */
 
+#if defined(CONFIG_SOC_DM365)
+#include <asm/arch/aintc_defs.h>
+#include <asm/arch/ddr2_defs.h>
+#include <asm/arch/emif_defs.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/pll_defs.h>
+#include <asm/arch/psc_defs.h>
+#include <asm/arch/syscfg_defs.h>
+#include <asm/arch/timer_defs.h>
+#endif
 #endif /* __ASM_ARCH_HARDWARE_H */