aspeed: AST2500 Pinctrl Driver

[u-boot] / arch / arm / include / asm / arch-fsl-layerscape / config.h

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 8c426af47e78b906ca9e578f36954f9c81b9c957..93e6597d9e0fb121011699bf677f59cdd7c07dd2 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -18,7 +18,7 @@
  */
 #define CONFIG_SYS_MEM_RESERVE_SECURE  (2048 * 1024)   /* 2MB */
 
-#ifdef CONFIG_LS2080A
+#ifdef CONFIG_ARCH_LS2080A
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS          { 1, 1, 4, 4 }
 #define        SRDS_MAX_LANES  8
 #define CONFIG_SYS_PAGE_SIZE           0x10000
@@ -33,8 +33,8 @@
 #define CONFIG_SYS_FSL_OCRAM_SIZE      0x00020000 /* Real size 128K */
 
 /* DDR */
-#define CONFIG_SYS_LS2_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30)
-#define CONFIG_MAX_MEM_MAPPED          CONFIG_SYS_LS2_DDR_BLOCK1_SIZE
+#define CONFIG_SYS_DDR_BLOCK1_SIZE     ((phys_size_t)2 << 30)
+#define CONFIG_MAX_MEM_MAPPED          CONFIG_SYS_DDR_BLOCK1_SIZE
 
 #define CONFIG_SYS_FSL_CCSR_GUR_LE
 #define CONFIG_SYS_FSL_CCSR_SCFG_LE
@@ -114,12 +114,6 @@
 
 #define CONFIG_SYS_FSL_ERRATUM_A008751
 
-/* ARM A57 CORE ERRATA */
-#define CONFIG_ARM_ERRATA_826974
-#define CONFIG_ARM_ERRATA_828024
-#define CONFIG_ARM_ERRATA_829520
-#define CONFIG_ARM_ERRATA_833471
-
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC          1
 #elif defined(CONFIG_FSL_LSCH2)
 #define CONFIG_SYS_FSL_OCRAM_BASE              0x10000000 /* initial RAM */
@@ -138,7 +132,7 @@
 #define CONFIG_SYS_FSL_PEX_LUT_BE
 
 /* SoC related */
-#ifdef CONFIG_LS1043A
+#ifdef CONFIG_ARCH_LS1043A
 #define CONFIG_SYS_FMAN_V3
 #define CONFIG_SYS_NUM_FMAN                    1
 #define CONFIG_SYS_NUM_FM1_DTSEC               7
@@ -191,6 +185,14 @@
 #elif defined(CONFIG_ARCH_LS1012A)
 #define GICD_BASE              0x01401000
 #define GICC_BASE              0x01402000
+#define CONFIG_SYS_FSL_SFP_VER_3_2
+#define CONFIG_SYS_FSL_SEC_MON_BE
+#define CONFIG_SYS_FSL_SFP_BE
+#define CONFIG_SYS_FSL_SRK_LE
+#define CONFIG_KEY_REVOCATION
+#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC           1
+#define CONFIG_SYS_DDR_BLOCK1_SIZE     ((phys_size_t)2 << 30)
+#define CONFIG_MAX_MEM_MAPPED          CONFIG_SYS_DDR_BLOCK1_SIZE
 
 #elif defined(CONFIG_ARCH_LS1046A)
 #define CONFIG_SYS_FMAN_V3
@@ -202,7 +204,7 @@
 
 #define CONFIG_SYS_FSL_IFC_BE
 #define CONFIG_SYS_FSL_SFP_VER_3_2
-#define CONFIG_SYS_FSL_SNVS_LE
+#define CONFIG_SYS_FSL_SEC_MON_BE
 #define CONFIG_SYS_FSL_SFP_BE
 #define CONFIG_SYS_FSL_SRK_LE
 #define CONFIG_KEY_REVOCATION