#define OCRAM_BASE_ADDR 0x10000000
#define OCRAM_SIZE 0x00020000
+#define OCRAM_BASE_S_ADDR 0x10010000
+#define OCRAM_S_SIZE 0x00010000
#define CONFIG_SYS_IMMR 0x01000000
#define CONFIG_SYS_DCSRBAR 0x20000000
+#define CONFIG_SYS_DCSR_DCFG_ADDR (CONFIG_SYS_DCSRBAR + 0x00220000)
+
#define CONFIG_SYS_FSL_DDR_ADDR (CONFIG_SYS_IMMR + 0x00080000)
#define CONFIG_SYS_CCI400_ADDR (CONFIG_SYS_IMMR + 0x00180000)
+#define CONFIG_SYS_FSL_CSU_ADDR (CONFIG_SYS_IMMR + 0x00510000)
#define CONFIG_SYS_IFC_ADDR (CONFIG_SYS_IMMR + 0x00530000)
#define CONFIG_SYS_FSL_ESDHC_ADDR (CONFIG_SYS_IMMR + 0x00560000)
#define CONFIG_SYS_FSL_SCFG_ADDR (CONFIG_SYS_IMMR + 0x00570000)
#define LPUART_BASE (CONFIG_SYS_IMMR + 0x01950000)
+#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_IMMR + 0x2400000)
+#define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000)
+
#ifdef CONFIG_DDR_SPD
#define CONFIG_SYS_FSL_DDR_BE
#define CONFIG_VERY_BIG_RAM
#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0
#define CONFIG_SYS_FSL_SEC_COMPAT 5
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
+#define CONFIG_SYS_FSL_ERRATUM_A008378
#else
#error SoC not defined
#endif
+#define FSL_IFC_COMPAT "fsl,ifc"
+#define FSL_QSPI_COMPAT "fsl,ls1-qspi"
+#define FSL_DSPI_COMPAT "fsl,vf610-dspi"
+
#endif /* _ASM_ARMV7_LS102XA_CONFIG_ */