mxc: Define architecture identifier

[u-boot] / arch / arm / include / asm / arch-mx31 / imx-regs.h

diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 798cc746722a0eec31f4b74d2554bb0d00a8c122..1dd952c55ffa7191e589374edbbdd74dbb82adf4 100644 (file)
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -541,6 +541,8 @@ struct esdc_regs {
 
 #endif
 
+#define ARCH_MXC
+
 #define __REG(x)     (*((volatile u32 *)(x)))
 #define __REG16(x)   (*((volatile u16 *)(x)))
 #define __REG8(x)    (*((volatile u8 *)(x)))
@@ -606,6 +608,13 @@ struct esdc_regs {
 #define UART4_BASE     0x43FB0000
 #define UART5_BASE     0x43FB4000
 
+#define I2C1_BASE_ADDR          0x43f80000
+#define I2C1_CLK_OFFSET                26
+#define I2C2_BASE_ADDR          0x43F98000
+#define I2C2_CLK_OFFSET                28
+#define I2C3_BASE_ADDR          0x43f84000
+#define I2C3_CLK_OFFSET                30
+
 #define ESDCTL_SDE                     (1 << 31)
 #define ESDCTL_CMD_RW                  (0 << 28)
 #define ESDCTL_CMD_PRECHARGE           (1 << 28)
@@ -662,7 +671,7 @@ struct esdc_regs {
 #define IPU_CONF_PF_EN         (1<<3)
 #define IPU_CONF_ROT_EN                (1<<2)
 #define IPU_CONF_IC_EN         (1<<1)
-#define IPU_CONF_SCI_EN                (1<<0)
+#define IPU_CONF_CSI_EN                (1<<0)
 
 #define ARM_PPMRR              0x40000015
 
@@ -901,4 +910,31 @@ struct esdc_regs {
 #define MXC_EHCI_IPPUE_DOWN            (1 << 8)
 #define MXC_EHCI_IPPUE_UP              (1 << 9)
 
+/*
+ * CSPI register definitions
+ */
+#define MXC_CSPI
+#define MXC_CSPICTRL_EN                (1 << 0)
+#define MXC_CSPICTRL_MODE      (1 << 1)
+#define MXC_CSPICTRL_XCH       (1 << 2)
+#define MXC_CSPICTRL_SMC       (1 << 3)
+#define MXC_CSPICTRL_POL       (1 << 4)
+#define MXC_CSPICTRL_PHA       (1 << 5)
+#define MXC_CSPICTRL_SSCTL     (1 << 6)
+#define MXC_CSPICTRL_SSPOL     (1 << 7)
+#define MXC_CSPICTRL_CHIPSELECT(x)     (((x) & 0x3) << 24)
+#define MXC_CSPICTRL_BITCOUNT(x)       (((x) & 0x1f) << 8)
+#define MXC_CSPICTRL_DATARATE(x)       (((x) & 0x7) << 16)
+#define MXC_CSPICTRL_TC                (1 << 8)
+#define MXC_CSPICTRL_RXOVF     (1 << 6)
+#define MXC_CSPICTRL_MAXBITS   0x1f
+
+#define MXC_CSPIPERIOD_32KHZ   (1 << 15)
+#define MAX_SPI_BYTES  4
+
+#define MXC_SPI_BASE_ADDRESSES \
+       0x43fa4000, \
+       0x50010000, \
+       0x53f84000,
+
 #endif /* __ASM_ARCH_MX31_IMX_REGS_H */