]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/include/asm/arch-mx5/imx-regs.h
driver/ddr/fsl: Add workaround for A008336
[u-boot] / arch / arm / include / asm / arch-mx5 / imx-regs.h
index 4955ccff87e5e02035ba70c728cb3df281abdb07..f059d0f664b35b4f5630347cdffeb60c56194efb 100644 (file)
  */
 #define WBED           1
 
-#define CS0_128                                        0
-#define CS0_64M_CS1_64M                                1
-#define CS0_64M_CS1_32M_CS2_32M                        2
-#define CS0_32M_CS1_32M_CS2_32M_CS3_32M                3
-
 /*
  * CSPI register definitions
  */
 #define MXC_CSPICTRL_CHAN      18
 
 /* Bit position inside CON register to be associated with SS */
-#define MXC_CSPICON_POL                4
-#define MXC_CSPICON_PHA                0
-#define MXC_CSPICON_SSPOL      12
+#define MXC_CSPICON_PHA                0  /* SCLK phase control */
+#define MXC_CSPICON_POL                4  /* SCLK polarity */
+#define MXC_CSPICON_SSPOL      12 /* SS polarity */
+#define MXC_CSPICON_CTL                20 /* inactive state of SCLK */
 #define MXC_SPI_BASE_ADDRESSES \
        CSPI1_BASE_ADDR, \
        CSPI2_BASE_ADDR, \
@@ -413,8 +409,7 @@ struct weim {
 
 #if defined(CONFIG_MX51)
 struct iomuxc {
-       u32     gpr0;
-       u32     gpr1;
+       u32     gpr[2];
        u32     omux0;
        u32     omux1;
        u32     omux2;
@@ -423,9 +418,7 @@ struct iomuxc {
 };
 #elif defined(CONFIG_MX53)
 struct iomuxc {
-       u32     gpr0;
-       u32     gpr1;
-       u32     gpr2;
+       u32     gpr[3];
        u32     omux0;
        u32     omux1;
        u32     omux2;